PMC150 datasheet(4/56 Pages) PADAUK

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PMC150/PMS150 Series

8-bit OTP Type IO Controller

Page 4 of 56

PDK-DS-PMX150-EN-V108 – Dec. 11, 2018

5.8.2. Power-Down mode (“stopsys”)................................................................................29

5.8.3. Wake-up .................................................................................................................30

5.9.

IO Pins ................................................................................................................................31

5.10.

Reset and LVR....................................................................................................................32

5.10.1. Reset ......................................................................................................................32

5.10.2. LVR reset ...............................................................................................................32

5.10.3. Notice for LVR reset ...............................................................................................32

IO Registers....................................................................................................................... 34

6.1.

ACC Status Flag Register (flag), IO address = 0x00 ...........................................................34

6.2.

Stack Pointer Register (sp), IO address = 0x02...................................................................34

6.3.

Clock Mode Register (clkmd), IO address = 0x03................................................................34

6.4.

Interrupt Enable Register (inten), IO address = 0x04...........................................................34

6.5.

Interrupt Request Register (intrq), IO address = 0x05 .........................................................35

6.6.

Timer 16 mode Register (t16m), IO address = 0x06............................................................35

6.7.

External Oscillator setting Register (eoscr, write only), IO address = 0x0a ..........................35

6.8.

IHRC oscillator control Register (ihrcr, write only), IO address = 0x0b.................................35

6.9.

Interrupt Edge Select Register (integs), IO address = 0x0c .................................................36

6.10.

Port A Digital Input Enable Register (padier), IO address = 0x0d ........................................36

6.11.

Port A Data Registers (pa), IO address = 0x10 ...................................................................36

6.12.

Port A Control Registers (pac), IO address = 0x11..............................................................36

6.13.

Port A Pull-High Registers (paph), IO address = 0x12.........................................................36

6.14.

MISC Register (misc), IO address = 0x3b ...........................................................................37

Instructions ....................................................................................................................... 38

7.1.

Data Transfer Instructions ...................................................................................................39

7.2.

Arithmetic Operation Instructions ........................................................................................42

7.3.

Shift Operation Instructions .................................................................................................44

7.4.

Logic Operation Instructions................................................................................................45

7.5.

Bit Operation Instructions ....................................................................................................47

7.6.

Conditional Operation Instructions.......................................................................................47

7.7.

System control Instructions .................................................................................................48

7.8.

Summary of Instructions Execution Cycle ...........................................................................50

7.9.

Summary of affected flags by Instructions ...........................................................................51

7.10.

BIT definition .......................................................................................................................51

Code Options .................................................................................................................... 52

Special Notes .................................................................................................................... 53

9.1.

Warning...............................................................................................................................53

9.2.

Using IC ..............................................................................................................................53

9.2.1. IO pin usage and setting .........................................................................................53

9.2.2. Interrupt ..................................................................................................................53

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