PMC156 datasheet(4/71 Pages) PADAUK

4 / 71 page

PMC156/PMS156 Series

8bit OTP Type IO Controller

Page 4 of 71

PDK-DS-PMX156-EN_V106 – Dec. 12, 2018

5.8

Power-Save and Power-Down ............................................................................................38

5.8.1. Power-Save mode (“stopexe”)..................................................................................38

5.8.2. Power-Down mode (“stopsys”) .................................................................................39

5.8.3. Wake-up...................................................................................................................40

5.9

IO Pins ................................................................................................................................42

5.10

Reset and LVR....................................................................................................................43

5.10.1. Reset......................................................................................................................43

5.10.2. LVR reset ...............................................................................................................43

5.10.3. Notice for LVR reset ...............................................................................................43

5.11

LCD Bias Voltage Generator ...............................................................................................45

IO Registers....................................................................................................................... 46

6.1

ACC Status Flag Register (flag), IO address = 0x00 ...........................................................46

6.2

Stack Pointer Register (sp), IO address = 0x02...................................................................46

6.3

Clock Mode Register (clkmd), IO address = 0x03 ...............................................................46

6.4

Interrupt Enable Register (inten), IO address = 0x04...........................................................46

6.5

Interrupt Request Register (intrq), IO address = 0x05 .........................................................47

6.6

Timer 16 mode Register (t16m), IO address = 0x06............................................................47

6.7

External Oscillator setting Register (eoscr, write only), IO address = 0x0a..........................47

6.8

IHRC oscillator control Register (ihrcr, write only), IO address = 0x0b ................................48

6.9

Interrupt Edge Select Register (integs), IO address = 0x0c .................................................48

6.10

Port A Digital Input Enable Register (padier), IO address = 0x0d ........................................49

6.11

Port B Digital Input Enable Register (pbdier), IO address = 0x0e ........................................50

6.12

Port A Data Registers (pa), IO address = 0x10 ...................................................................51

6.13

Port A Control Registers (pac), IO address = 0x11..............................................................51

6.14

Port A Pull-High Registers (paph), IO address = 0x12.........................................................51

6.15

Port B Data Registers (pb), IO address = 0x14 ...................................................................51

6.16

Port B Control Registers (pbc), IO address = 0x15..............................................................51

6.17

Port B Pull-High Registers (pbph), IO address = 0x16.........................................................51

6.18

MISC Register (misc), IO address = 0x3b ...........................................................................52

Instructions ....................................................................................................................... 53

7.1

Data Transfer Instructions ...................................................................................................54

7.2

Arithmetic Operation Instructions ........................................................................................56

7.3

Shift Operation Instructions .................................................................................................58

7.4

Logic Operation Instructions................................................................................................59

7.5

Bit Operation Instructions ....................................................................................................61

7.6

Conditional Operation Instructions ......................................................................................61

7.7

System control Instructions .................................................................................................62

7.8

Summary of Instructions Execution Cycle ...........................................................................64

7.9

Summary of affected flags by Instructions ...........................................................................65

7.10

BIT definition .......................................................................................................................65

Code Options .................................................................................................................... 66

Special Notes .................................................................................................................... 67

9.1. Warning ...................................................................................................................................67

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