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TLC555CPWRG4 Datasheet(PDF) 25 Page - Texas Instruments

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Part # TLC555CPWRG4
Description  TLC555 LinCMOS??Timer
PDF  42 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TLC555CPWRG4 Datasheet(HTML) 25 Page - Texas Instruments

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50V
0.1uF
C12
50V
0.1uF
C4
100k
R6
D4
BAT54WSTR
10.0k
R7
10.0k
R8
TP2
Trig
J1
Vcc
J2
GND
1
TRIG
3
RESET
5
THRES
DISCH
VDD
TLC555CP
U1
100V
0.01uF
C8
50V
1000pF
C6
10.0k
R5
D6
BAT54WSTR
10.0
R4
TP3
Output
100k
R1
D1
BAT54WSTR
10.0k
R3
2.20k
R2
TP1
Reset
D3
SMBJ15A-13-F
10.0
R9
50V
1000pF
C5
50V
1000pF
C7
50V
1000pF
C9
50V
10uF
C11
50V
1000pF
C3
50V
1000pF
C10
50V
1000pF
C1
D2
BAT54WSTR
D5
BAT54WSTR
D7
BAT54WSTR
t − Time − 1 s/div
Output A
Output B
Output C
t = 0
twC = 1.1 RCCC
twC
twB = 1.1 RBCB
twA = 1.1 RACA
twA
twB
25
TLC555
www.ti.com
SLFS043I – SEPTEMBER 1983 – REVISED JULY 2019
Product Folder Links: TLC555
Submit Documentation Feedback
Copyright © 1983–2019, Texas Instruments Incorporated
Typical Applications (continued)
8.2.4.3 Application Curve
See Figure 25
Figure 26. Sequential Timer Waveforms
8.2.5 Designing for Improved ESD Performance
The TLC555 internal HBM and CDM protection allows for safe assembly in ESD controlled environments. In
applications that may expose pins of the TLC555 to ESD, additional protection is highly recommended. The test
board schematic below has bypass capacitors, current-limiting resistors, and voltage clamping TVS diodes to
provide additional protection for commonly exposed pins [Reset, Trig, and Output] against ESD.
Figure 27. ESD Test Schematic



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