USB334X datasheet(10/92 Pages) MICROCHIP

10 / 92 page

USB334x

DS00002646A-page 10

 2009-2018 Microchip Technology Inc.

2.2

USB3343 Diagram and Pin Definitions

The illustration below is viewed from the top of the package.

The following table details the pin definitions for the figure above.

FIGURE 2-2:

USB3343 PIN LOCATIONS - TOP VIEW

TABLE 2-2:

USB3343 PIN DESCRIPTIONS

Name

Direction/

Type

Active

Level

Description

1DIR

Output,

CMOS

N/A

Controls the direction of the data bus. When the PHY

has data to transfer to the Link, it drives DIR high to

take ownership of the bus. When the PHY has no

data to transfer it drives DIR low and monitors the

bus for commands from the Link.

2CLKOUT

Output,

CMOS

N/A

ULPI Clock Out Mode:

60MHz ULPI clock output. All ULPI signals are

driven synchronous to the rising edge of this clock.

ULPI Clock In Mode:

Connect this pin to VDDIO to configure 60MHz ULPI

Clock IN mode as described in Section 5.5.1.

3NXT

Output,

CMOS

High

The PHY asserts NXT to throttle the data. When the

Link is sending data to the PHY, NXT indicates when

the current byte has been accepted by the PHY.

4DATA[0]

I/O,

CMOS

N/A

ULPI bi-directional data bus. DATA[0] is the LSB.

5DATA[1]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

VBUS

VDD33

NXT

DIR

DATA0

DATA2

DATA1

VBAT

CLKOUT

24Pin QFN

4x4mm

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