LT3755 datasheet(9/28 Pages) AD

9 / 28 page

LT3755/LT3755-1/LT3755-2

Rev. E

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PIN FUNCTIONS

PWMOUT (Pin 1/Pin 11): Buffered Version of PWM Signal

for Driving LED Load Disconnect NMOS or Level Shift.

This pin also serves in a protection function for the FB

overvoltagecondition—willtoggleiftheFBinputisgreater

than the FB regulation voltage (VFB) plus 60mV (typical).

The PWMOUT pin is driven from INTVCC. Use of a FET with

gate cut-off voltage higher than 1V is recommended.

FB (Pin 2/Pin 12): Voltage Loop Feedback Pin. FB is

intendedforconstant-voltageregulationorforLEDprotec-

tion/open LED detection. The internal transconductance

amplifierwithoutputVCwillregulateFBto1.25V(nominal)

through the DC/DC converter. If the FB input is regulating

the loop, the OPENLED pull-down is asserted. This ac-

tion may signal an open LED fault. If FB is driven above

the FB threshold (by an external power supply spike, for

example),theOPENLEDpull-downwillbede-assertedand

the PWMOUT pin will be driven low to protect the LEDs

from an overcurrent event. Do not leave the FB pin open.

If not used, connect to GND.

ISN (Pin 3/Pin 13): Connection Point for the Negative

TerminaloftheCurrentFeedbackResistor.IfISNisgreater

than 2.9V, the LED current can be programmed by ILED =

100mV/RLEDwhenVCTRL>1.2VorILED=(VCTRL–100mV)/

(10 • RLED) when VCTRL ≤ 1V. Input bias current is typi-

cally 25µA. Below 3V, ISN is an input to the short-circuit

protection feature that forces GATE to 0V if ISP exceeds

ISN by more than 150mV (typ).

ISP (Pin 4/Pin 14): Connection Point for the Positive

Terminal of the Current Feedback Resistor. Input bias

current is dependent upon CTRL pin voltage as shown

in the TPC. ISP is an input to the short-circuit protection

feature when ISN is less than 3V.

VC (Pin 5/Pin 15): Transconductance Error Amplifier

Output Pin Used to Stabilize the Voltage Loop with an RC

Network. This pin is high impedance when PWM is low, a

feature that stores the demand current state variable for

thenextPWMhightransition.Connectacapacitorbetween

this pin and GND; a resistor in series with the capacitor is

recommended for fast transient response.

CTRL(Pin6/Pin16):CurrentSenseThresholdAdjustment

Pin. Regulating threshold V(ISP – ISN) is 1/10th VCTRL plus

an offset for 0V < VCTRL < 1V. For VCTRL > 1.2V the current

sensethresholdisconstantatthefull-scalevalueof100mV.

For 1V < VCTRL < 1.2V, the dependence of current sense

threshold upon VCTRL transitions from a linear function

to a constant value, reaching 98% of full-scale value by

VCTRL = 1.1V. Do not leave this pin open.

VREF(Pin7/Pin1):VoltageReferenceOutputPin,Typically

2V.ThispindrivesaresistordividerfortheCTRLpin,either

foranalogdimmingorfortemperaturelimit/compensation

of LED load. Can supply up to 100μA.

PWM (Pin 8/Pin 2): A signal low turns off switcher, idles

oscillator and disconnects VC pin from all internal loads.

PWMOUT pin follows PWM pin. PWM has an internal pull-

down resistor. If not used, connect to INTVCC.

OPENLED (Pin 9/Pin 3, LT3755 and LT3755-2): An

open-collector pull-down on OPENLED asserts if the FB

input is greater than the FB regulation threshold minus

50mV (typical). To function, the pin requires an external

pull-up current less than 1mA. When the PWM input is low

and the DC/DC converter is idle, the OPENLED condition

is latched to the last valid state when the PWM input was

high. When PWM input goes high again, the OPENLED

pin will be updated. This pin may be used to report an

open LED fault.

SYNC (Pin 9/Pin 3, LT3755-1 Only): The SYNC pin is used

to synchronize the internal oscillator to an external logic

level signal. The RT resistor should be chosen to program

aninternalswitchingfrequency20%slowerthantheSYNC

pulse frequency. Gate turn-on occurs a fixed delay after

the rising edge of SYNC. For best PWM performance, the

PWM rising edge should occur at least 200ns before the

SYNC rising edge. Use a 50% duty cycle waveform to drive

this pin. This pin replaces OPENLED on LT3755-1 option

parts. If not used, tie this pin to GND.

SS (Pin 10/Pin 4): Soft-Start Pin. This pin modulates

oscillator frequency and compensation pin voltage (VC)

clamp. The soft-start interval is set with an external capac-

itor. The pin has a 10µA (typical) pull-up current source

to an internal 2.5V rail. The soft-start pin is reset to GND

by an undervoltage condition (detected by SHDN/UVLO

pin) or thermal limit.

(MSOP/QFN)

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