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FCE424

REGULATOR

12-BIT ADC

CLAMP

CLAMP

SERIAL

INTERFACE

OUTPUT

BUFFER

7

6

9

8

10

11

14

13

15

16

17

18

20

21

22

23

19

24

25

26

27

28

29

30

31

32

33

34

35

37

38

39

40

41

42

43

44

45

48

46

47

DGND2

AGND4

IN

SHD

SHP

CLPADC

CLPOB

CLKADC

DGND1

VCCD2

D8

D7

D6

VCCO2

OGND2

VCCO1

OGND1

D5

D4

D3

D2

REGEN

SEN

D1

D0

SCLK

SDATA

DEC

REF32

VRT

VRB

VCCA3

AGND3

ADCIN

Vref

VCCA1

VCCA2

AGND2

TDA9965

36

D9

D11

STDBY

VCCD1

D10

1

3

4

5

2

AGND5

AGND1

12

n.c.

STGE

PGAOUT

REF = 3.2 V

10

12

TRACK AND HOLD

CLOCK

4-BIT DAC

10-BIT DAC

PGA

INIT-ON-

POWER

Fig.1 Block diagram.