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74LS164 Datasheet(PDF) 5 Page - ON Semiconductor |
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74LS164 Datasheet(HTML) 5 Page - ON Semiconductor |
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5 / 8 page ![]() SN74LS164 http://onsemi.com 5 AC WAVEFORMS *The shaded areas indicate when the input is permitted to change for predictable output performance. Figure 1. Clock to Output Delays and Clock Pulse Width Figure 2. Master Reset Pulse Width, Master Reset to Output Delay and Master Reset to Clock Recovery Time Figure 3. Data Setup and Hold Times CONDITIONS: MR = H 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V tPHL tPLH CP Q CP Q MR trec tW tPHL tW I/fmax 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V CP D Q ts(H) th(H) ts(L) th(L) tW 1/fmax 1.3 V 1.3 V * 1.3 V |
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