LP5012 datasheet(7/51 Pages) TI

7 / 51 page

7 Specifications

7.1 Absolute Maximum Ratings

over operating ambient temperature range (unless otherwise noted)(1)

MIN

MAX

UNIT

Voltage on EN, IREF, OUTx, SCL, SDA, VCC

–0.3

Voltage on ADDRx

–0.3

VCC + 0.3

Voltage on VCAP

–0.3

Continuous power dissipation

Internally limited

Junction temperature, TJ-MAX

–40

125

°C

Storage temperature, Tstg

–65

150

°C

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

7.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±4000

Charged-device model (CDM), per JEDEC specification JESD22-C101(2)

±1500

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 500-V HBM is possible with the necessary precautions.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 250-V CDM is possible with the necessary precautions.

7.3 Recommended Operating Conditions

over operating ambient temperature range (unless otherwise noted)

MIN

MAX

UNIT

Input voltage on VCC

2.7

5.5

Voltage on OUTx

5.5

Voltage on ADDRx, EN, SDA, SCL

5.5

Operating ambient temperature, TA

–40

°C

7.4 Thermal Information

THERMAL METRIC(1)

LP5009 or LP5012

UNIT

RUK (QFN)

PW (TSSOP)

20 PINS

24 Pins

RθJA

Junction-to-ambient thermal resistance

53.7

98.3

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

55.3

41.5

°C/W

RθJB

Junction-to-board thermal resistance

27.4

53.5

°C/W

ψJT

Junction-to-top characterization parameter

1.9

5.0

°C/W

ψJB

Junction-to-board characterization parameter

27.4

53.1

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

12.9

n/a

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

www.ti.com

LP5009, LP5012

SLVSEH2B – MAY 2019 – REVISED AUGUST 2020

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Product Folder Links: LP5009 LP5012

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