| Electronic Components Datasheet Search |
|
MAX2016ETI Datasheet(PDF) 12 Page - Maxim Integrated Products |
|
|
|||||||||||||||||||||||||||||
MAX2016ETI Datasheet(HTML) 12 Page - Maxim Integrated Products |
|
12 / 19 page ![]() LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements 12 ______________________________________________________________________________________ Measuring VSWR and Return Loss In Figure 2, the two logarithmic amplifiers measure the incident and the reflected power levels to produce two proportional output voltages at OUTA and OUTB. Since OUTD is a DC voltage proportional to the difference of OUTA and OUTB, return loss (RL) and VSWR can be easily calculated within a microprocessor using the following relationships: where return loss (RL) is expressed in decibels, VCENTER is the output voltage (typically 1V) when PRFINA = PRFINB, and SLOPE is typically equal to 25mV/dB (for R3 = 0 Ω). RL P P VV SLOPE RFINA RFINB OUTD CENTER =− = − () MAX2016 CSETL COUTL VREF LOGARITHMIC DETECTOR LOGARITHMIC DETECTOR COUTL OUTD SETD 20k Ω RFINB RFINA OUTD TRANSMITTER COUPLER CIRCULATOR ATTENUATOR GND Figure 1. VSWR Monitoring Configuation MAX2016 RFINA RFINB GND ADC µP IN LOAD 4-PORT DIRECTIONAL COUPLER LOGARITHMIC DETECTOR LOGARITHMIC DETECTOR OUTD SETD 20k Ω Figure 2. Measuring Return Loss and VSWR of a Given Load |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |