L6986H datasheet(67/68 Pages) STMICROELECTRONICS

67 / 68 page

Figure 51.

Master driving capability to synchronize the L6986H ......................................... 48

Figure 52.

Evaluation board schematic .......................................................... 50

Figure 53.

Magnitude bode plot ............................................................... 53

Figure 54.

Phase margin bode plot ............................................................. 53

Figure 55.

Top layer ....................................................................... 54

Figure 56.

Bottom layer..................................................................... 54

Figure 57.

Efficiency: VIN = 13.5 V - VOUT = 3.3 V - fsw = 500 kHz ....................................... 55

Figure 58.

Efficiency: VIN = 13.5 V - VOUT = 3.3 V - fsw = 500 kHz (log scale)................................ 55

Figure 59.

Efficiency: VIN = 13.5 V - VOUT = 5 V - fsw = 500 kHz ......................................... 56

Figure 60.

Efficiency: VIN = 13.5 V - VOUT = 5 V - fsw = 500 kHz (log scale) ................................. 56

Figure 61.

Efficiency: VIN = 24 V - VOUT = 3.3 V - fsw = 500 kHz ......................................... 57

Figure 62.

Efficiency: VIN = 24 V - VOUT = 3.3 V - fsw = 500 kHz (log scale) ................................. 57

Figure 63.

Efficiency: VIN = 24 V - VOUT = 5 V - fsw = 500 kHz .......................................... 58

Figure 64.

Efficiency: VIN = 24 V - VOUT = 5 V - fsw = 500 kHz (log scale) .................................. 58

Figure 65.

HTSSOP16 package outline.......................................................... 59

L6986H

List of figures

DS12905 - Rev 2

page 67/68

L6986H Datasheet(PDF) 67 Page - STMicroelectronics