LTC4373CMS8 datasheet(4/20 Pages) AD

4 / 20 page

LTC4372/LTC4373

Rev. 0

For more information www.analog.com

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All currents into device pins are positive; all currents out of

device pins are negative. All voltages are referenced to GND unless

otherwise specified.

Note 3: An internal clamp limits the GATE pin to a minimum of 10V above

SOURCE or 100V above GND. A second internal clamp limits the GATE pin

to a minimum of 28V below GND. Driving this pin to voltages beyond the

clamp may damage the device.

ELECTRICAL CHARACTERISTICS The

denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. IN = SOURCE =12V, SHDN = 0V, UV = 2V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

IGATE(DOWN) GATE Pull-Down Current

Shutdown: SHDN = 2V, UV = 0V, ∆VGATE = 5V

Reverse Current: ∆VSD = –0.1V, ∆VGATE = 5V

Reverse Battery: IN = SOURCE = –7V, GATE = –3V

0.5

130

230

VGATE(NEG) GND-GATE clamp

IGATE = 10mA (Note 3)

–28

–32

–35

VSOURCE(TH) Reverse SOURCE Threshold for GATE Off

GATE = 0V (Note 5)

–0.9

–1.8

–2.7

tOFF

Gate Turn-Off Delay Time

∆VSD = Step 0.1V to –0.8V, CGATE = 0pF, ∆VGATE <1V l

0.5

1.5

µs

tON

Gate Turn-On Delay Time

IN = 12V, SOURCE = OUT = 0V, ∆VGATE > 4.5V,

CGATE = 0pF, SHDN = 2V to 0V, UV = 0V to 1.25V

100

500

1200

µs

LTC4372

I2UPU

2UPU Pull-Up Current

–1

–2

–3

µA

VSHDN

SHDN Threshold

SHDN Falling

1.2

1.4

VSHDN(HYST) SHDN Threshold Hysteresis

ISHDN

SHDN Leakage Current

SHDN = 1.2V

±1

±50

LTC4373

VUV

UV Threshold

UV Falling

1.174

1.191

1.208

VUV(HYST)

UV Threshold Hysteresis

IUV(LK)

UV Leakage Current

UV = 1.2V

±1

±50

IUVOUT(LK) UVOUT Leakage Current

UV = 2V, UVOUT = 1.2V

(C-Grade, I-Grade)

(H-Grade)

±1

±50

±200

RUVOUT#

UVOUT Output Low Resistance

I = 2mA

140

500

tUV

Under Voltage Detect to UVOUT Assert Low UV = Step 1.25V to 1.1V

300

µs

Note 4: When testing the single MOSFET configuration, IN is connected to

SOURCE. When testing the back-to-back MOSFET configuration, SOURCE

is left unconnected.

Note 5: SOURCE ≤ –1.8V triggers a 130mA pull-down current from GATE

to SOURCE. An internal clamp limits the GATE pin to a minimum of 28V

below GND. Driving SOURCE to voltages beyond the clamp may damage

the device.

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