LT8698S datasheet(21/40 Pages) AD

21 / 40 page

Table 2 shows the ideal RT value for a desired switching

frequency.

Table 2. Switching Frequency vs RT Value

Switching Frequency (MHz)

RT (kΩ)

5.76

2.8

6.19

2.6

6.81

2.4

7.5

2.2

8.25

9.09

1.8

10.2

1.6

11.5

1.5

12.4

1.4

13.3

1.3

14.7

1.2

15.8

1.1

17.4

19.1

0.9

21.5

0.8

24.3

0.7

0.6

32.4

0.5

39.2

0.4

49.9

0.3

66.5

RT can also be found for the desired switching frequency

using Equation 4 where f is in MHz.

RT =

20.25

– 1.013k

(4)

Operating Frequency Selection and Trade-Offs

Selection of the operating frequency is a trade-off between

efficiency, component size and input voltage range. The

advantage of high frequency operation is that smaller

inductor and capacitor values may be used. The disadvan-

tages are lower efficiency and a smaller input voltage range.

The highest switching frequency (fSW(MAX)) for a given

application before min on-time limited can be calculated

using Equation 5.

fSW(MAX) =

VOUT/ISP

tON(MIN)•VIN(MAX)

•1000

(5)

LT8698S/LT8698S-1

Rev. A

For more information www.analog.com

APPLICATIONS INFORMATION

voltage is 7% below is regulation point for at least 4.2ms,

the LT8698S will stop switching for 59ms. After 59ms,

the LT8698S will start switching. If the output can return

to its nominal regulation point within 4.2ms after starting

to switch, then normal operation will resume. Otherwise,

if the output still remains more than 7% below its regu-

lation point, the LT8698S will again stop switching for

59ms and this sequence will repeat. This latch-off and

auto-retry feature reduces the power dissipation in a fault

condition to about an 7% duty cycle of what it otherwise

would have been.

Using RCBL as an Output Current Monitor

The primary function of the RCBL pin is to set the cable

drop compensation as discussed in the Cable Drop

Compensation section. The secondary function of the

RCBL pin is to produce an output voltage that is propor-

tional to the output load current. The RCBL pin can there-

fore be used as an output load monitor. The voltage on the

RCBL pin obeys Equation 3 relation to USB load current.

VRCBL= ILOAD • RSEN • 46

(3)

This formula is valid when the LT8698S is enabled.

Since the RCBL pin current is part of the cable drop com-

pensation control loop, excessive capacitive loading on

the RCBL pin can cause USB output voltage overshoot

during load steps. Keep the capacitive loading on the

RCBL pin below 100pF or isolate the load capacitance

with 100kΩ in series between the RCBL pin and the input

it is driving as shown in Figure 6.

Figure 6. Using the RCBL Pin as Output Current Monitor

100k

ADC

8698S F06

RCBL

Setting the Switching Frequency

The LT8698S uses a constant frequency PWM architec-

ture that can be programmed to switch from 300kHz to

3MHz by using a resistor tied from the RT pin to ground.

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