Quad Port 10/100/1000BASE-T PHY with RGMII / RTBI MAC Interfaces

VSC8244

The VSC8244 is the industry’s smallest, lowest power quad port Gigabit Ethernet transceiver for low-cost

RGMII and RTBI switch and router applications. In 1000BASE-T mode, the VSC8244’s power consumption

is 30% lower than the next best competitor. The device’s compact 19mm x 19mm BGA package is ideal for

high-density switch applications. Vitesse’s mixed signal and DSP architecture yields robust performance,

supporting both full and half duplex 10BASE-T, 100BASE-TX, and 1000BASE-T over >140m of Category 5,

unshielded twisted pair (UTP) cable, with industry leading tolerance to NEXT, FEXT, Echo, and system noise.

SPECIFICA TIONS:

GENERAL DESCRIPTION:

741 Calle Plano

Camarillo, CA 93012, USA

Tel: +1 805.388.3700

Fax: +1 805.987.5896

www.vitesse.com

Vitesse, ASIC-Friendly, FibreTimer, TimeStream and Snoop Loop are trademarks of Vitesse Semiconductor Corporation.

All other trademarks or registered trademarks mentioned herein are the property of their respective holders. Vitesse

Semiconductor Corporation ("Vitesse") retains the right to make changes to its products or specifications to improve

performance, reliability or manufacturability. All information in this document, including descriptions of features,

functions, performance, technical specifications and availability, is subject to change without notice at any time.

PARAMETER

TYP

UNIT

COMMENTS

<640

mW

Steady state power consumption per port

VDD I/O

3.3, 2.5, 1.5

V

I/O power supply voltage options

VDDA

3.3

V

Analog supply voltage

VDDDIG

1.2

V

Core power supply voltage

25

MHz

Crystal parallel resonant frequency (+/- 100ppm tolerance)

For more information on Vitesse Products visit the Vitesse web site

at www.vitesse.com or contact Vitesse Sales at (800) VITESSE

or sales@vitesse.com

CONTROL

LED INTERFACE

PCS

DECODER

PCS

ENCODER

TIMING RECOVERY

+

DAC

HYBRID

VGA

ADC

FFE

PMA (DSP Data Pump)

PCS

MDI (Analog Front End)

4

TX FIR

X4

NC1

NC2

NC3

EC

LED[4:0]_n

CLK125

MAC

REF_FILT

XTAL1/2

REF_REXT

TXD[3:0]_n

TX_CTL_n

TX_CLK_n

RXD[3:0]_n

MAC I/F

Port 3

Port 2

Port 1

TRELLIS

DECODER

PAM-5 SYMBOL

MAPPER,

SCRAMBLER

PAM-5 SYMBOL

DE-MAPPER,

DESCRAMBLER

Port 0

RX_CTL_n

RX_CLK_n

RGMII

or

RTBI

TXVP_A_n

TXVN_A_n

TXVP_B_n

TXVN_B_n

TXVP_C_n

TXVN_C_n

TXVP_D_n

TXVN_D_n

SYSTEM

JTAG

TEST

MANAGER

MANAGEMENT

INTERFACE

CMODE[7:0]

RESET

EECLK

EEDAT

MDINT_n

MDIO

MDC

SOFT_RESET

CLK125

micro

BLOCK DIAGRAM: