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Rev. E, Sep 2005
ML3406
Application Information (2)
Using
Ceramic
Input
and
Output
Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for
switching
regulator
applications.
Because
the
ML3406’s control loop does not depend on the output
capacitor’s ESR for stable operation, ceramic capacitors
can be used freely to achieve very low output ripple and
small circuit size.
However, care must be taken when ceramic capacitors are
used at the input and the output. When a ceramic
capacitor is used at the input and the power is supplied by
a wall adapter through long wires, a load step at the output
can induce ringing at the input, VIN. At best, this ringing
can couple to the output and be mistaken as loop
instability. At worst, a sudden inrush of current through the
long wires can potentially cause a voltage spike at VIN,
large enough to damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage
characteristics of all the ceramics for a given value and
size.
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% - ( L1 + L2 + L3 +…)
Where L1, L2, etc. are the individual losses as a
percentage of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of
losses in ML3406 circuits: VIN quiescent current and 1
2R
losses. The VIN quiescent current loss dominates the
efficiency loss at very low load currents where as the 1
2R
loss dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
very low load currents can be misleading since the actual
power lost is of no consequence as illustrated in Figure 6.
Figure 6
1. The
VIN quiescent current is due to two components:
the DC bias current as given in the electrical
characteristics and the internal main switch and
synchronous switch gate charge currents. The gate
charge
current
results
form
switching
the
gate
capacitance of the internal power MOSFET switches.
Each time the gate is switched form high to low to high
again, a packet of charge, dQ, moves from VIN to
ground. The resulting dQ/dt is the current out of VIN that
is typically larger than the DC bias current. In
continuous mode, IGATECHG=f(QT+QB) where QT and QB
are the gate charges of the internal top and bottom
switches. Both the DC bias and gate charge losses are
proportional to Vin and thus their effects will be more
pronounced at higher supply voltages.
2. I
2R losses are calculated from the resistances of the
internal switches, RSW, and external inductor RL. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET RDS(ON) and the duty cycle
(DC) as follows:
RSW = (RDS (ON) TOP)(DC)+(RDS (ON)BOT) (1-DC)
3. The RDS (ON) for both the top and bottom MOSFETs
can be obtained from
the Typical Performance
Characteristics curves. Thus, to obtain 1
2R losses,
simply add RSW to RL and multiply the result by the
square of the average output current.
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for
less than 2% total additional loss.
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