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TPS745 Datasheet(PDF) 29 Page - Texas Instruments

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Part # TPS745
Description  TPS745-Q1 500-mA LDO With Power-Good in Small Wettable Flank WSON Packages
PDF  44 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS745 Datasheet(HTML) 29 Page - Texas Instruments

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10 Layout
10.1 Layout Guidelines
• Place input and output capacitors as close to the device as possible.
• Use copper planes for device connections to optimize thermal performance.
• Place thermal vias around the device to distribute heat.
• Only place tented thermal vias directly beneath the thermal pad of the DRV or DRB package. An untented via
can wick solder or solder paste away from the thermal pad joint during the soldering process, leading to a
compromised solder joint on the thermal pad.
10.2 Layout Examples
1
2
3
6
5
4
GND PLANE
R1
Cff
COUT
CIN
R2
RPG
*
Signal via to Pin1
*Pull-up resistor not required for push-pull option
Figure 10-1. Layout Example for the DRV Package
1
2
4
8
7
5
GND PLANE
R1
Cff
COUT
CIN
R2
RPG
*
Signal via to Pin1
*Pull-up resistor not required for push-pull option
6
3
Figure 10-2. Layout Example for the DRB Package
www.ti.com
TPS745-Q1
SBVS355B – JUNE 2019 – REVISED JANUARY 2021
Copyright © 2021 Texas Instruments Incorporated
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Product Folder Links: TPS745-Q1



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