| Electronic Components Datasheet Search |
|
DSC2140 Datasheet(PDF) 2 Page - Micrel Semiconductor |
|
|
|||||||||||||||||||||||||||||
DSC2140 Datasheet(HTML) 2 Page - Micrel Semiconductor |
|
2 / 5 page ![]() ______________________________________________________________________________________________________________________________________________ DSC2140 DSC2240 Page 2 MK-Q-B-P-D-12050110 DSC2140 Low-Jitter I2C/SPI Programmable HCSL Oscillator DSC2240 Pin Description Pin No. Pin Name Pin Type Description 1 Enable I Enables outputs when high and disables when low 2 NC NA Leave unconnected or grounded 3 NC NA DSC2140: Leave unconnected or grounded SCLK I DSC2240: Serial clock from master 4 GND Power Ground 5 SDA I DSC2140: I2C Serial Data MOSI DSC2240: SPI Serial Data from Master to Slave 6 SCL I DSC2140: I2C Serial Clock MISO O DSC2240: SPI Serial Data from Slave to Master 7 CS_bar I DSC2140: I2C Chip Select (Active Low) SS I DSC2240: SPI Slave Select (Active Low) 8 Output1+ O Positive HCSL Output 9 Output1- O Negative HCSL Output 10 NC NA Leave unconnected or grounded 11 NC NA Leave unconnected or grounded 12 VDD2 Power Power Supply 13 VDD Power Power Supply 14 FS I Default output clock frequency bit Operational Description The DSC2140/2240 is a HCSL oscillator consisting of a MEMS resonator and a support PLL IC. The HCSL output is generated through independent 8-bit programmable dividers from the output of the internal PLL. DSC2140/2240 allows for easy programming of the output frequencies using I2C/SPI interface. Upon power-up, the initial output frequency is controlled by an internal pre- programmed memory (OTP). This memory stores all coefficients required by the PLL for two different default frequencies. The control pin (FS) selects the initial frequency. Once the device is powered up, a new output frequency can be programmed. Programming details are provided in the Programming Guide. Standard default frequencies are described in the following sections. Discera supports customer defined versions of the DSC2140/2240. When Enable (pin 1) is floated or connected to VDD, the DSC2140/2240 is in operational mode. Driving Enable to ground will disable both output drivers (hi-impedance mode). Output Clock Frequencies Table 2 lists the standard frequency configurations and the associated ordering information to be used in conjunction with the ordering code. Customer defined combinations are available. Table 2. Pre-programmed pin-selectable output frequency combinations Ordering Info Freq (MHz) Select Bit [FS] – Default is [1] 0 1 D0001 fOUT 125 156.25 DXXXX fOUT Contact factory for additional configurations. Frequency select bit are weakly tied high so if left unconnected the default setting will be [1] and the device will output the associated frequency highlighted in Bold. |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |