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ADIS16475-1/PCBZ Datasheet(PDF) 21 Page - Analog Devices |
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ADIS16475-1/PCBZ Datasheet(HTML) 21 Page - Analog Devices |
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21 / 37 page  Data Sheet ADIS16475 Rev. D | Page 21 of 37 Accelerometer Data Formatting Table 26 and Table 27 offer various numerical examples that demonstrate the format of the linear acceleration data in both 16-bit and 32-bit formats. Table 26. 16-Bit Accelerometer Data Format Examples Acceleration Decimal Hex Binary +8 g +32,000 0x7D00 0111 1101 0000 0000 +0.5 mg +2 0x0002 0000 0000 0000 0010 +0.25 mg +1 0x0001 0000 0000 0000 0001 0 mg 0 0x0000 0000 0000 0000 0000 −0.25 mg −1 0xFFFF 1111 1111 1111 1111 −0.5 mg −2 0xFFFE 1111 1111 1111 1110 −8 g −32,000 0x8300 1000 0011 0000 0000 Table 27. 32-Bit Accelerometer Data Format Examples Acceleration Decimal Hex +8 g +2,097,152,000 0x7D000000 +0.25/215 mg +2 0x00000002 +0.25/216 mg +1 0x00000001 0 0 0x00000000 −0.25/216 mg −1 0xFFFFFFFF −0.25/215 mg −2 0xFFFFFFFE −8 g −2,097,152,000 0x83000000 X-Axis Accelerometer (X_ACCL_LOW and X_ACCL_OUT) Table 28. X_ACCL_LOW Register Definition Addresses Default Access Flash Backup 0x10, 0x11 Not applicable R No Table 29. X_ACCL_LOW Bit Definitions Bits Description [15:0] X-axis accelerometer data; additional resolution bits Table 30. X_ACCL_OUT Register Definition Addresses Default Access Flash Backup 0x12, 0x13 Not applicable R No Table 31. X_ACCL_OUT Bit Definitions Bits Description [15:0] X-axis accelerometer data, high word; twos complement, ±8 g range; 0 g = 0x0000, 1 LSB = 0.25 mg The X_ACCL_LOW (see Table 28 and Table 29) and X_ACCL_ OUT (see Table 30 and Table 31) registers contain the accelerometer data for the x-axis. Y-Axis Accelerometer (Y_ACCL_LOW and Y_ACCL_OUT) Table 32. Y_ACCL_LOW Register Definition Addresses Default Access Flash Backup 0x14, 0x15 Not applicable R No Table 33. Y_ACCL_LOW Bit Definitions Bits Description [15:0] Y-axis accelerometer data; additional resolution bits Table 34. Y_ACCL_OUT Register Definition Addresses Default Access Flash Backup 0x16, 0x17 Not applicable R No Table 35. Y_ACCL_OUT Bit Definitions Bits Description [15:0] Y-axis accelerometer data, high word; twos complement, ±8 g range; 0 g = 0x0000, 1 LSB = 0.25 mg The Y_ACCL_LOW (see Table 32 and Table 33) and Y_ACCL_ OUT (see Table 34 and Table 35) registers contain the accelerometer data for the y-axis. Z-Axis Accelerometer (Z_ACCL_LOW and Z_ACCL_OUT) Table 36. Z_ACCL_LOW Register Definition Addresses Default Access Flash Backup 0x18, 0x19 Not applicable R No Table 37. Z_ACCL_LOW Bit Definitions Bits Description [15:0] Z-axis accelerometer data; additional resolution bits Table 38. Z_ACCL_OUT Register Definition Addresses Default Access Flash Backup 0x1A, 0x1B Not applicable R No Table 39. Z_ACCL_OUT Bit Definitions Bits Description [15:0] Z-axis accelerometer data, high word; twos complement, ±8 g range; 0 g = 0x0000, 1 LSB = 0.25 mg The Z_ACCL_LOW (see Table 36 and Table 37) and Z_ACCL_ OUT (see Table 38 and Table 39) registers contain the accelerometer data for the z-axis. |
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