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MCP48FVB01 Datasheet(PDF) 55 Page - Microchip Technology |
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MCP48FVB01 Datasheet(HTML) 55 Page - Microchip Technology |
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55 / 84 page ![]() 2015 Microchip Technology Inc. DS20005466A-page 55 MCP48FVBXX FIGURE 7-3: Continuous Write Sequence. A D 4 A D 3 A D 2 A D 1 A D 0 00 C M D E R R D 1 5 D 1 4 D 1 3 D 1 2 D 1 1 D 1 0 D 0 9 D 0 8 D 0 7 D 0 6 D 0 5 D 0 4 D 0 3 D 0 2 D 0 1 D 0 0 111111111111111111111111 Valid (1) 0 0 0 0 0 0 0 (4) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Invalid (2, 3) SDI SDO A D 4 A D 3 A D 2 A D 1 A D 0 00 C M D E R R D 1 5 D 1 4 D 1 3 D 1 2 D 1 1 D 1 0 D 0 9 D 0 8 D 0 7 D 0 6 D 0 5 D 0 4 D 0 3 D 0 2 D 0 1 D 0 0 111111111111111111111111 Valid (1) 0 0 0 0 0 0 0 (4) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Invalid (2, 3) SDI SDO A D 4 A D 3 A D 2 A D 1 A D 0 00 C M D E R R D 1 5 D 1 4 D 1 3 D 1 2 D 1 1 D 1 0 D 0 9 D 0 8 D 0 7 D 0 6 D 0 5 D 0 4 D 0 3 D 0 2 D 0 1 D 0 0 111111111111111111111111 Valid (1) 1111111 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Invalid (2, 3) SDI SDO Address Data bits (8, 10, or 12 bits) Command Note 1: If a valid Address/Command occurs, then the data bits are dependent on the resolution of the device. 12-bit = D11:D00, 10-bit = D09:D00, and 8-bit = D07:D00. Data is right justified for ease of Host Controller operation (i.e., no data manipulation before transmitting the desired value). 2: Unimplemented data bits (D15:D12 on 12-bit device, D15:D10 on 10-bit device, D15:D08 on 8-bit device) will be output as ‘1’. 3: If an Error condition occurs (CMDERR = L), all following SDO bits will be low until the CMDERR condition is cleared (the CS pin is forced to the inactive state). 4: This CMDERR bit will be forced to ‘0’, regardless if this Address+Command combination is valid. This command will not be completed and requires the CS pin to return to VIH to clear the CMDERR condition. Address Data bits (8, 10, or 12 bits) Command Address Data bits (8, 10, or 12 bits) Command |
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