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LM3204 Datasheet(PDF) 12 Page - National Semiconductor (TI) |
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LM3204 Datasheet(HTML) 12 Page - National Semiconductor (TI) |
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12 / 16 page ![]() Operation Description (Continued) Circuit Operation Referring to Figure 1, the LM3204 operates as follows. Dur- ing the first part of each switching cycle, the control block in the LM3204 turns on the internal PFET (P-channel MOS- FET) switch. This allows current to flow from the input through the inductor to the output filter capacitor and load. The inductor limits the current to a ramp with a slope of around (V IN -VOUT) / L, by storing energy in a magnetic field. During the second part of each cycle, the controller turns the PFET switch off, blocking current flow from the input, and then turns the NFET (N-channel MOSFET) synchronous rectifier on. In response, the inductor’s magnetic field col- lapses, generating a voltage that forces current from ground through the synchronous rectifier to the output filter capacitor and load. As the stored energy is transferred back into the circuit and depleted, the inductor current ramps down with a slope around V OUT / L. The output filter capacitor stores charge when the inductor current is going high, and releases it when inductor current is going low, smoothing the voltage across the load. The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and synchronous rectifier at SW to a low-pass filter formed by the inductor and output filter capacitor. The output voltage is equal to the average voltage at the SW pin. PWM Mode While in PWM (Pulse Width Modulation) mode, the output voltage is regulated by switching at a constant frequency and then modulating the energy per cycle to control power to the load. Energy per cycle is set by modulating the PFET switch on-time pulse width to control the peak inductor cur- rent. This is done by comparing the PFET drain current to a slope-compensated reference current generated by the error amplifier. At the beginning of each cycle, the clock turns on the PFET switch, causing the inductor current to ramp up. When the current sense signal ramps past the error amplifier signal, the PWM comparator turns off the PFET switch and turns on the NFET synchronous rectifier, ending the first part of the cycle. If an increase in load pulls the output down, the error amplifier output increases, which allows the inductor current to ramp higher before the comparator turns off the PFET. This increases the average current sent to the output and adjusts for the increase in the load. The minimum on- time of PFET in PWM mode is 50ns (typ.). Bypass Mode The LM3204 contains an internal PFET switch for bypassing the PWM DC-DC converter during Bypass mode. In Bypass mode, this PFET is turned on to power the PA directly from the battery for maximum RF output power. Bypass mode is more efficient than operating in PWM mode at 100% duty cycle because the resistance of the bypass PFET is less than the series resistance of the PWM PFET and inductor. This translates into higher voltage available on the output in Bypass mode, for a given battery voltage. The part can be placed in bypass mode by sending BYP pin high. This is called Forced Bypass Mode and it remains in bypass mode until BYP pin goes low. Alternatively the part can go into Bypass mode automatically. This is called Auto-bypass mode or Automatic Bypass mode. The bypass switch turns on when the difference between the input voltage and programmed output voltage is less than 250mV (typ.) for more than the bypass delay time of 15µs (typ.). The bypass switch turns off when the input voltage is higher than the programmed output voltage by 450mV (typ.) for longer than the bypass delay time. The bypass delay time is provided to prevent false triggering into Automatic Bypass mode by either spikes or dips in V IN. This method is very system resource friendly in that the Bypass PFET is turned on automatically when the input voltage gets close to the output voltage, typical scenario of a discharging battery. It is also turned off automatically when the input voltage rises, typical scenario of a charger connected. Another scenario could be changes made to V CON voltage causing Bypass PFET to turn on and off automatically. It is recommended to connect BYPOUT pin directly to the output capacitor with a separate trace and not to the FB pin. If the V CON is less than approximately 0.15V, the Bypass FET is turned off. 20138936 FIGURE 1. Typical Operating System Circuit www.national.com 12 |
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