MPT57216

192-CHANNEL COLOR TFT COLUMN (SOURCE) DRIVER

SGLS092 – MARCH 1997

11

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

CLK

LS

OUTn

tsu(LS)

tr(LS)

tf(LS)

(See

Note B)

tp(OUT)

tw(LS)

(See

Note A)

(1H Last)

Case of Clock(CLK) Restart

Case of Clock(CLK) Suspend

V0 Level (See Notes C and D)

Vx Level

NOTES: A. Case of data input change: if data has changed after the last clock of 1H, then it is recommended to add a dummy clock of one pulse

after the last 1H pulse of the clock.

B. Case of suspending clock (CLK) after data transfer (1H) completion: it is recommended that the data input not be changed while

the clock is suspended.

C. All timing parameters and measurements are referenced at the 0.5 VDD point of each waveform except tp(OUT) on the OUTn

waveform. The reference point on the OUTn waveform is V0 + 0.1 Vx for positive-going transitions and V0 – 0.1 Vx for negative-going

transitions.

D. OUTn waveform transitions are from V0 level to Vx level. Maximum V0 and Vx levels are 8.0 V due to tester limitations.

E. Input pulse generators have the following characteristics: PRR

≤ 1 MHz, duty cycle ≤ 50%, tr ≤ 15 ns, tf ≤ 15 ns, zo = 50 Ω.

F. VIH and VIL for all waveforms are at 0.8 VDD and 0.2 VDD respectively.

Figure 3. LS and OUTn Timing Waveforms

CLK

EIOx

(OUT)

tp(EN)

tCLK

tsu

C32 – C10

th

64th Data

Next 1st Data

64

1

2

3

VOH

VOL

NOTES: A. Input pulse generators have the following characteristics: PRR

≤ 1 MHz, duty cycle ≤ 50%, tr ≤ 15 ns, tf ≤ 15 ns, zo = 50 Ω.

B. VIH and VIL for all waveforms are at 0.8 VDD and 0.2 VDD respectively.

C. All timing parameters and measurements are referenced at the 0.5 VDD point of each waveform.

Figure 4. Cxx and EIOx (OUT) Timing Waveforms