NJU6854 datasheet(21/111 Pages) NJRC

21 / 111 page

NJU6854

-21 -

Ver.2004-06-29

(1-8)

Data Read

Just after address setting or data write operation, make sure to conduct dummy read operation once. The reason lies

below, data from CPU is temporarily held in the built-in bus holder, and then released to the internal data bus, therefore a

dummy data will be read out by the 1st “Display Data Read” instruction, the wanted data will be read out by the 2nd

instruction.

Display Data Read in 8-bit

Display Data Read in 16-bit

Instruction Data Read in 8-bit

Instruction Data Read in 16-bit

Fig 5 Data Read Operations

RDB

D 0~D 7

address set(AX,AY)

address= n

WRb

dummy read

op code

address= n

address= n+1

RDB

D~ D 7

address set(AX,AY)

address= n

dummy read

op code

address= n

address= n+1

RDb

D 0~D 7

address set(AX,AY)

address= n

dummy read

op code

address= n

address= n+1

D~ D 7

address set(AX,AY)

address= n

dummy read

op code

address= n

address= n+1

RDB

D 0~D 7

address set(AX,AY)

address= n

WRb

dummy read

op code

address= n

address= n+1

RDB

D~ D 7

address set(AX,AY)

address= n

dummy read

op code

address= n

address= n+1

RDb

D 0~D 7

address set(AX,AY)

address= n

dummy read

op code

address= n

address= n+1

D~ D 7

address set(AX,AY)

address= n

dummy read

op code

address= n

address= n+1

op code

address= n

address= n+1

RDb

D 0~D 7

address set(AX,AY)

address=n

WRb

dummy read

D 8~D 15

op code

dummy read

data read

address

= n

n+1

data read

address

= n+1

n+1

n+2

data read

address = n+2

n+2

D 0~D 7

address set(AX,AY)

address=n

dummy read

D~ D 15

n+1

n+2

D 0~D 7

address set(AX,AY)

address=n

dummy read

D 8~D 15

op code

dummy read

RDb

D 0~D 7

address set(AX,AY)

address=n

WRb

dummy read

D 8~D 15

op code

dummy read

data read

address

= n

n+1

data read

address

= n+1

n+1

n+2

data read

address = n+2

n+2

D 0~D 7

address set(AX,AY)

address=n

dummy read

D~ D 15

n+1

n+2

D 0~D 7

address set(AX,AY)

address=n

dummy read

D 8~D 15

op code

dummy read

RDb

address

WRb

Set “ RA ”

instruction

Table address

/register address

Data read

D0~D7

data

1DH

address

Set “ RA ”

instruction

Table address

/register address

Data read

D0~D7

data

1DH

RDb

address

WRb

Set “ RA ”

instruction

Table address

/register address

Data read

D0~D7

data

1DH

address

Set “ RA ”

instruction

Table address

/register address

Data read

D0~D7

data

1DH

RDb

D 0~D 7

address

WRb

D 8~D 15

1D H

data

address

1DH

invalid

D 0~D 7

address

D 8~D 15

1D H

data

Data read

address

invalid

Table address

Set “ RA ”

instruction

data

D 0~D 7

address

D 8~D 15

1D H

data

address

1DH

D~ D 7

address

D 8~D 15

1D H

data

address

1DH

RDb

D 0~D 7

address

WRb

D 8~D 15

1D H

data

address

1DH

invalid

D 0~D 7

address

D 8~D 15

1D H

data

Data read

address

invalid

Table address

Set “ RA ”

instruction

data

D 0~D 7

address

D 8~D 15

1D H

data

address

1DH

D~ D 7

address

D 8~D 15

1D H

data

address

1DH

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