UPD16449 datasheet(21/27 Pages) NEC

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Data Sheet S15677EJ1V0DS

µµµµPD16449

Switching Characteristics (TA =

−−−−30 to +85°°°°C, VDD1 = 3.0 to 5.5 V, VDD2 = 5.0 V ±±±± 0.5 V, VSS1 = VSS2 = 0 V)

Parameter

Symbol

Condition

MIN.

TYP.

MAX.

Unit

tPHL

CL = 20 pF

Start pulse propagation delay

time

tPLH

CL = 20 pF

Clock frequency 1

fCLK 1

MHz

Clock frequency 2

fCLK 2

With 3-phase clock input

MHz

Logic input capacitance

CI1

Other than STHL, STHR

STHL, STHR input capacitance

CI2

STHL, STHR

Video input capacitance

C1 to C3, VVI = 2.0 V

Timing Requirements (TA =

−−−−30 to +85 °°°°C, VDD1 = 3.0 to 5.5 V, VDD2 = 5.0 V ±±±± 0.5 V, VSS1 = VSS2 = 0 V)

Parameter

Symbol

Condition

MIN.

TYP.

MAX.

Unit

Clock pulse width

PWCLI

Duty = 50%

Start pulse setup time

tSETUP

8ns

Start pulse hold time

tHOLD

8ns

Reset pulse width

PWRES

INH setup time

tISETUP

INH hold time

tIHOLD

Reset-INH time

tR-I

INH pulse width

PWINH

5CLK

Remark Keep the rise and fall times of the logic input signals to within tr = tf = 5 ns (10 to 90%).

As an example, the switching characteristic wave of CLI1 is defined on the next page.

UPD16449 Datasheet(PDF) 21 Page - NEC

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