ACE25QC160GLFMLTH datasheet(25/73 Pages) ACE

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ACE25QC160GLFMLTH Datasheet(PDF) 25 Page - ACE Technology Co., LTD.

25 / 73 page

ACE25QC160G

16M BIT SPI NOR FLASH

VER 1.2

The ACE25QC160G is also backward compatible to ACE’s previous generations of serial flash memories,

in which the Status Register-1&2 can be written using a single “Write Status Register-1 (01h)” command. To

complete the Write Status Register- 1&2 instruction, the /CS pin must be driven high after the sixteenth bit

of data that is clocked in as shown in Figure 5.c(SPI mode) & Figure 5.d(QPI mode). If /CS is driven high

after the eighth clock, the Write Status Register-1 (01h) instruction will only program the Status Register-1,

the Status Register-2 will not be affected (Previous generations will clear CMP and QE bits).

Figure5 c. Write Status Register-1/2 Instruction (SPI Mode)

Figure5 d. Write Status Register-1/2 Instruction (QPI Mode)

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