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PS4053EEE Datasheet(PDF) 6 Page - Pericom Semiconductor Corporation |
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PS4053EEE Datasheet(HTML) 6 Page - Pericom Semiconductor Corporation |
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6 / 9 page ![]() 6 PS8461 02/16/00 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches r e t e m a r a P l o b m y Ss n o it i d n o C) C ° ( p m e Tn i M ) 1 ( p y T ) 2 ( x a M ) 1 ( s ti n U c i m a n y D e m i T n O - n r u Tt N O 5 20 90 0 2 s n ll u F5 7 2 e m i T ff O - n r u Tt F F O 5 20 65 2 1 ll u F5 7 1 e k a M - e r o f e B - k a e r B l a v r e t n I t N E P O 5 2 0 3 n o it c e j n I e g r a h C ) 3 ( QCL V , F n 1 = S R , V 0 = S = Ω 0 5 . 15 C p Electrical Characteristics - Single 5V(continued) (V+ = +5V ±10%, V– = 0V, GND = 0V, VAH = VIH = 2.4V, VAL = VIL = 0.8V) r e t e m a r a Pl o b m y Ss n o it i d n o C) C ° ( p m e Tn i M ) 1 ( p y T ) 2 ( x a M ) 1 ( s ti n U h c ti w S e g n a R l a n g i S g o l a n A ) 3 ( V G O L A N A ll u F0 + VV e c n a t si s e R - n OR N O I O N V , A m 1 = M O C , V 5 . 1 = V 3 = + V 5 20 5 25 2 5 Ω ll u F0 0 7 c i m a n y D e m i T n o it i s n a r T ) 3 ( t S N A R T V , 1 e r u g i F N I V 4 . 2 = V 1 O N V , V 5 . 1 = 8 O N V 0 = 5 2 0 3 25 7 5 s n e m i T n O - n r u T ) 3 ( t N O V , 2 e r u g i F H N I V 4 . 2 = V L N I V , V 0 = 1 O N V 5 . 1 = 0 0 20 0 5 e m i T ff O - n r u T ) 3 ( t F F O V , 2 e r u g i F H N I V 4 . 2 = V L N I V , V 0 = 1 O N V 5 . 1 = 5 70 0 4 n o it c e j n I e g r a h C ) 3 ( QCL V , F n 0 1 = S R , V 0 = S 0 = Ω 15 C p Electrical Characteristics - Single 3V Supply (V+ = +3.3V ±10%, V– = 0V, GND = 0V, VAH = VIH = +2.4V, VAL = VIL L = +0.8V) Notes: 1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design 4. ∆RΟΝ = RΟΝ max - RΟΝ min 5. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured. 6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC. 7. Worst-case isolation is on channel 4 because of its proximity to the COM pin. Off isolation = 20log VCOM/VNO, VCOM = output, VNO = input to off switch 8. Leakage testing at single supply is guaranteed by testing with dual supplies. |
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