LT3922 datasheet(19/28 Pages) AD

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LT8386

Rev. 0

For more information www.analog.com

The gate driver for this PMOS is supplied through the

VOUT pin. When the PWM pin voltage is greater than 1.7V,

the driver will pull the gate of the PMOS to a maximum of

12.5V below the VOUT pin. If VOUT is below 12.5V, the gate

drive is necessarily reduced. For constant current applica-

tions, leave PWMTG open, connect the load directly after

the current sense resistor, and connect PWM to INTVCC.

In these cases, analog dimming may be implemented with

the CTRL pin.

The drain source voltage rating of the chosen PMOS

should be greater than the maximum output voltage.

Typically the output voltage is a little higher than the sum

of the forward voltages of the LEDs in the string. However,

when the string is broken, the output voltage will begin to

increase due to the imbalance of inductor current and load

current. As described in detail later, the LT8386 will not

reduce the inductor current nor limit the output voltage

until the FB pin voltage approaches 1.2V. Therefore, the

maximum output voltage is ultimately determined by the

resistor network between FB and VOUT.

In most applications, the gate source voltage rating of

the PMOS should be at least 10V. The only exceptions

to this rule are applications for which the output voltage

is always less than 10V. The PWMTG driver will try to

pull the gate of the PMOS down to 10V below VOUT, but

it cannot pull the gate below GND. Therefore, when the

maximum output voltage is less than 10V, the PMOS gate

source voltage rating will be sufficient if it is merely equal

to or greater than the output voltage.

Finally, the drain current rating of the PMOS must exceed

the programmed LED current. Assuming this condition

and the conditions above are met, the only electrical

parameter to be considered is the on-resistance. Other

parameters such as gate charge are less important

because PWM dimming frequencies are typically too low

for efficiency to be affected noticeably by gate charging

loss or transition loss.

Table 4 lists recommended manufacturers of PMOS

devices.

Table 4. PMOS Manufacturers

MANUFACTURER

WEBSITE

Infineon

www.infineon.com

Vishay Intertechnology

www.vishay.com

NXP Semiconductors

www.nxp.com

Selecting an RP Resistor for Internal PWM Dimming

If the RP pin is tied to GND, an external pulse-width mod-

ulated signal at the PWM pin will control PWM dimming

of the LED load. The signal will enable the PWMTG driver

and turn on the external PMOS device when it is higher

than 1.7V.

However, the LT8386 is capable of PWM dimming even

when an external PWM signal is not available. In this case,

an internal PWM signal with frequency set by a resistor

at the RP pin and duty ratio set by a DC voltage at the

PWM pin will control the PWMTG driver. The RP resistor

should be one of the five values listed in Table 5. For each

of these values, the PWM frequency is a unique ratio of

the switching frequency.

Table 5. Internal PWM Dimming Frequencies

RATIO

SWITCHING FREQUENCY

2MHz

1MHz

400kHz

76.8k

210

1.95kHz

977Hz

390Hz

118k

211

977Hz

488Hz

195Hz

169k

212

488Hz

244Hz

98Hz

237k

213

244Hz

122Hz

49Hz

332k

214

122Hz

61Hz

24Hz

APPLICATIONS INFORMATION

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