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CBTV4010 Datasheet(PDF) 2 Page - NXP Semiconductors

Part # CBTV4010
Description  10-bit DDR SDRAM mux/bus switch
PDF  10 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

CBTV4010 Datasheet(HTML) 2 Page - NXP Semiconductors

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Philips Semiconductors
Product data
CBTV4010
10-bit DDR SDRAM mux/bus switch
2
2002 Feb 19
853-2315 27756
FEATURES
• Enable signal is SSTL_2 compatible
• Optimized for use in Double Data Rate (DDR) SDRAM
applications
• Designed to be used with 400 Mbps/200 MHz DDR data bus
• Switch on resistance is designed to eliminate the need for series
resistor to DDR SDRAM
• 20 Ω on resistance
• Internal 100 Ω pull-down resistors
• Low differential skew
• Matched rise/fall slew rate
• Low cross-talk data-data/data-DQM
• Independent DIMM control lines
• Latch-up protection exceeds 500 mA per JESD78
• ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
DESCRIPTION
This 10-bit bus switch is designed for 2.3 V to 2.7 V VCC operation
and SSTL_2 select input levels.
Each Host port pin is multiplexed to one of four DIMM port pins.
When the S pin is low the corresponding 10-bit bus switch is turned
on. The on-state connects the Host port to the DIMM port through a
20
Ω nominal series resistance. When the S pin is high the switch is
open and a high-impedance state exists between the two ports. The
DIMM port is terminated with a 100
Ω resistor to ground when the
S pin is high. The design is intended to have only one DIMM port
active at any time.
The part incorporates a very low cross-talk design. It has a very low
skew between outputs (< 50 ps) and low skew (< 50 ps) for rising
and falling edges. The part has optional performance in DDR data
bus applications.
Each switch has been optimized for connection to 1 or 2-bank
DIMMs.
The low internal RC time constant of the switch (20
Ω × 7 pF) allows
data transfer to be made with minimal propagation delay.
The CBTV4010 is characterized for operation from 0 to +85
°C.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
Tamb = 25 °C; GND = 0 V
TYPICAL
UNIT
tPLH
tPHL
Propagation delay
An to Yn
CL = 7 pF; VCC = 2.5 V
140
ps
CIN
Input capacitance – control pins
VI = 0 V or VCC
1.8
pF
CON
Channel on capacitance
Vin = 1.5 V
7
pF
ICCZ
Total supply current
VCC = 2.5 V
500
µA
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
DWG NUMBER
TFBGA64 (Thin Fine Pitch BGA)
0 to +85
°C
CBTV4010EE
SOT746-1



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