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PL603-27 Datasheet(PDF) 2 Page - PhaseLink Corporation |
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PL603-27 Datasheet(HTML) 2 Page - PhaseLink Corporation |
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2 / 7 page ![]() Multimedia Clocks PL603-27 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990, FAX (510) 492-0991 Rev.: 07-12-04 Page 2 of 7 PRODUCT DESCRIPTION PhaseLink’s PL603-27 is a clock generator IC, specifically designed to accommodate the clock requirements of the set top box, HDTV, and personal video recording (PVR) receiver equipment. It offers seven different clock signals while utilizing a single low-cost 27MHz crystal input. PhaseLink’s PL603-27 is designed to save board space and implementation cost while producing multiple system clock outputs. Figure 1: Overall PL603-27 Block Diagram Figure 2: PL603-27 Pin Assignment FEATURES • High accuracy synthesis Phase Locked Loop design • Eliminates costly quartz crystals and crystal oscillators • Very low jitter and Phasenoise • Single 27MHz crystal input • Seven different output frequencies: o Two 27MHz output o One 83.33MHz output o One 12.288MHz output o One 3.3864MHz output o One 1.536MHz output o One 48KHz output • OE (output enable) feature • Low-power sub-micron CMOS process • Single 3.3V +/- 10% power supply • Available in 28-pin SSOP package Xtal OSC PLL PLL 27MHz Xtal ÷ ÷ ÷ 27MHz 48kHz 1.536MHz 3.6864MHz 12.288MHz 83.33MHz 27MHz OE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 22 23 24 25 26 27 28 21 20 19 18 17 DNC OE XOUT XIN 27MHz 27MHz 83.33MHz 3.6864MHz 12.288MHz 1.536MHz 48KHz VDD48K VDDOSC VDDBUF VDDBUF VDD83M VDD27M VDDANA VDDANA GNDOSC GNDDIG GNDBUF GNDBUF GND83M GND27M GNDANA GNDANA GND48K |
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