PLL620-20

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991

www.phaselink.com Rev 09/03/04 Page 1

FEATURES

• Output range: 100 – 200MHz (no multiplication).

• Available outputs: PECL, or LVDS.

• OESEL/OECTRL for both PECL & LVDS.

• Supports 2.5V or 3.3V-Power Supply.

• Available in die form.

• Die thickness 10 mil.

DESCRIPTION

The PLL620-20 is an XO IC specifically designed to

work with high frequency fundamental and third

overtone crystals. Its design was optimized to

tolerate higher limits of interelectrode capacitance

and bonding capacitance to improve yield. It

achieves very low current into the crystal resulting in

better overall stability. It is ideal for XO applications

requiring LVDS or PECL output levels at high

frequencies.

DIE SPECIFICATIONS

Name

Value

Size

62 x 65 mil

Reverse side

GND

Pad dimensions

80 micron x 80 micron

Thickness

10 mil

BLOCK DIAGRAM

DIE CONFIGURATION

OUTPUT SELECTION AND ENABLE

Pad #9

OUTSEL

Selected Output

0

LVDS

1

PECL (default)

Pad #9

OUTSEL

Pad #30

OE_CTRL

State

0

Tri-state

0

1

Output enabled (default)

0

Output enabled (default)

1

1

Tri-state

Pad #9:

Bond to GND to set to “0”, bond to VDD to set to “1”

Pad #30: Logical states defined by PECL levels if OUTSEL is “1”

Logical states defined by CMOS levels if OUTSEL is “0”

X+

X-

OE

Q

PLL620-20

Q

Oscillator

Amplifier

18

19

20

21

23

25

7

13

10

26

29

31

Y

X

(0,0)

(1550,1475)

65 mil

24

22

17

16

15

14

12

11

9

8

6

1

2

3

4

5

27

28

30

OUTSEL^

PECL

LVDS

VDDBUF

VDDBUF

PECLB

LVDSB

N/C

GNDBUF

XIN

XOUT

N/C

OE

CTRL

N/C

N/C

Die ID:

A1212-12

C502A