PLL702-02

Low EMI Peripheral Clock Generator for Notebook & Motherboards

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991

www.phaselink.com

Rev 08/30/05 Page 2

BLOCK DIAGRAM

Note 1: In order to use VDD25M as power source for 10_8MHz (pin 13), 24.576MHz (pin 7), and 12MHz (pin 12), it is necessary to select this feature

through the VDD_SEL and SEL10_8M inputs (see Power Selection and 10_8MHz Frequency Selection Tables on p.1).

Note 2: Only 27MHz output is modulated for low EMI via Spread Spectrum.

SST(0:1)

PLL2

25MHz

27_14.318MHz

XTAL

OSC

XIN

XOUT

PLL

SST

24.576MHz

(pin7)

12MHz

10_8MHz

SEL10_8

XTAL_SEL

24.576MHz

(pin6)