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SLG46585 Datasheet(PDF) 80 Page - Dialog Semiconductor |
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SLG46585 Datasheet(HTML) 80 Page - Dialog Semiconductor |
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80 / 210 page ![]() Datasheet 18-Sep-2019 CFR0011-120-00 Revision 3.3 80 of 210 © 2019 Dialog Semiconductor SLG46585 GreenPAK Programmable Mixed-Signal Matrix with Asynchronous State Machine, LDOs, and DC/DC Converter 7.5 CNT/DLY TIMING DIAGRAMS 7.5.1 Delay Mode (Edge Select: Both, Counter Data:3) 7.5.2 Count Mode (Count Data:3), Counter Reset (Rising Edge Detect Reset by Reset_In Input) Figure 28: Delay Mode Timing Diagram Figure 29: Counter Mode Timing Diagram with Reset Signal delay_in RC osc: force Power-On (always running) Delay output Asynchronous delay variable Asynchronous delay variable delay = period x (counter data + 1) + variable variable is from 0 to 1 clock period delay = period x (counter data + 1) + variable variable is from 0 to 1 clock period delay_in RC osc: auto Power-On (powers up from delay in) Delay output offset offset delay = offset + period x (counter data + 1) offset = approx. 4-22 µs at room temp. delay = offset + period x (counter data + 1) offset = approx. 4-22 µs at room temp. RESET_IN CLK Counter OUT Count start in 2 CLK + variable after reset 4 clk period pulse |
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