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WF5025MLB Datasheet(PDF) 7 Page - Nippon Precision Circuits Inc |
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WF5025MLB Datasheet(HTML) 7 Page - Nippon Precision Circuits Inc |
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7 / 16 page ![]() WF5025 series NIPPON PRECISION CIRCUITS INC.—7 WF5025BL1 (2.5V operation) VDD = 2.25 to 2.75V, VSS = 0V, Ta = −40 to +85°C unless otherwise noted. WF5025BL1 (3.0V operation) VDD = 2.7 to 3.6V, VSS = 0V, Ta = −40 to +85°C unless otherwise noted. Parameter Symbol Condition Rating Unit min typ max HIGH-level output voltage VOH Q: Measurement cct 1, VDD = 2.25V, IOH = 8mA 1.65 1.95 – V LOW-level output voltage VOL Q: Measurement cct 2, VDD = 2.25V, IOL = 8mA – 0.3 0.4 V HIGH-level input voltage VIH INHN 0.7VDD –– V LOW-level input voltage VIL INHN – – 0.3VDD V Output leakage current IZ Q: Measurement cct 2, INHN = LOW VOH = VDD – – 10 µA VOL = VSS – – 10 µA Current consumption IDD2 Measurement cct 3, load cct 1, INHN = open, CL = 30pF, f = 100MHz –14 28 mA Standby current IST Measurement cct 3, INHN = LOW – – 3 µA INHN pull-up resistance RUP1 Measurement cct 4 2 6 12 M Ω RUP2 20 100 200 k Ω Feedback resistance Rf Measurement cct 5 50 – 150 k Ω Oscillator amplifier output resistance RD Design value. A monitor pattern on a wafer is tested. 170 200 230 Ω Built-in capacitance CG Design value. A monitor pattern on a wafer is tested. 6.8 8 9.2 pF CD 8.5 10 11.5 pF Parameter Symbol Condition Rating Unit min typ max HIGH-level output voltage VOH Q: Measurement cct 1, VDD = 2.7V, IOH = 8mA 2.3 2.4 – V LOW-level output voltage VOL Q: Measurement cct 2, VDD = 2.7V, IOL = 8mA – 0.3 0.4 V HIGH-level input voltage VIH INHN 0.7VDD –– V LOW-level input voltage VIL INHN – – 0.3VDD V Output leakage current IZ Q: Measurement cct 2, INHN = LOW VOH = VDD – – 10 µA VOL = VSS – – 10 µA Current consumption IDD2 Measurement cct 3, load cct 1, INHN = open, CL = 30pF, f = 100MHz –19 38 mA Standby current IST Measurement cct 3, INHN = LOW – – 5 µA INHN pull-up resistance RUP1 Measurement cct 4 248 M Ω RUP2 15 75 150 k Ω Feedback resistance Rf Measurement cct 5 50 – 150 k Ω Oscillator amplifier output resistance RD Design value. A monitor pattern on a wafer is tested. 170 200 230 Ω Built-in capacitance CG Design value. A monitor pattern on a wafer is tested. 6.8 8 9.2 pF CD 8.5 10 11.5 pF |
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