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ATXP064B Datasheet(PDF) 92 Page - Dialog Semiconductor |
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ATXP064B Datasheet(HTML) 92 Page - Dialog Semiconductor |
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92 / 116 page ![]() 92 ATXP064B DS-XP064B–172C–8-2020 Figure 13-18. Hardware Reset Sequence Note: The CS signal should be in the high state before the RESET signal is deasserted. Figure 13-19. Hardware Reset Sequence from UDPD 13.12 Reset Summary The following table summarizes the effects of the various reset functions: CS SCK RESET SO (Output) High-impedance High-impedance SI (Input) tRST tREC tCSLS RESET SO ICC High-impedance Ultra-Deep Power-Down Mode Current Active Current Standby Mode Current tHWRES tRST Table 13-2. Effects of Reset Functions Action Volatile Registers Non-Volatile Registers (1) Sector Protection Registers EPE bit Power Cycle Default state Unchanged Default state (protected) See Table 12-4 JEDEC Standard Hardware Reset (In-Band Reset) (2) Default state Unchanged Default state (protected) See Table 12-4 Hardware Reset (RESET pin) (not in UDPD) (3) Default state Unchanged Unchanged See Table 12-4 |
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