MDS 307-01/02 F

6

Revision 121304

ICS307-01/02

Programming Example

To generate 66.66 MHz from a 14.31818 MHz input, the RDW should be 59, the VDW should be 276, and

the Output Divide is 2. Selecting the minimum internal load capacitance, CMOS duty cycle, and CLK2 to be

OFF means that the following three bytes are sent to the ICS307:

As show in Figure 2, after these 24 bits are clocked into the ICS307, taking STROBE high will send this

data to the internal latch and the CLK output will lock within 10 ms.

Note: If STROBE is in the high state and SCLK is pulsed, DATA is clocked directly to the internal latch and

the output conditions will change accordingly. Although this will not damage the ICS307, it is recommended

that STROBE be kept low while DATA is being clocked into the ICS307 in order to avoid unintended

changes on the output clocks.

AC Parameters for Writing to the ICS307

External Components/Crystal Selection

The ICS307 requires a 0.01

µF decoupling capacitor to be connected between VDD and GND. It must be connected

close to the ICS307 to minimize lead inductance. A 33

Ω terminating resistor can be used in series with CLK1 and

CLK2 outputs. A parallel resonant, fundamental mode crystal with a load (correlation) capacitance of C should be

used, where C is the value calculated from Table 4. For crystals with a specified load capacitance greater than C,

additional crystal capacitors may be connected from each of the pins X1 and X2 to ground as shown in the Block

capacitance in pF and C is the capacitance value from Table 4. These external capacitors are only required for

applications where the exact frequency is critical. For a clock input, connect to X1 and leave X2 unconnected (no

capacitors on either pin).

00110001

10001010

00111011

Byte 1

Byte 2

Byte 3

Parameter

Condition

Min.

Max.

Units

Setup time

10

ns

Hold time after SCLK

10

ns

Data wait time

10

ns

Strobe pulse width

40

ns

SCLK Frequency

50

MHz

DATA

F1

TTL

C0

C1

R1

R0

t

hold

t

setup

SCLK

STROBE

t

s

t

w

Figure 2. Timing Diagram for Programming the ICS307