Networking & PCI Clock Source

MDS 650-36 D

2

Revision 030206

In te gr ated C i rcuit Syste m s

ICS650-36

Pin Assignment

CLK Output Selection Table

Note: All frequencies are in MHz.

Pin Descriptions

12

1

11

2

10

3

9

X2

4

X1

5

GND

6

GND

7

CLK3

8

PDTS

REF

S0

VDD

S2

CLK1

S1

CLK2

GND

16

15

14

13

VDD

VDD

16-pin (173 mil) TSSOP

S2

S1

S0

REF

CLK1

CLK2

CLK3

0

0

0

OFF

33.30

50

125

0

0

1

ON

33.333

33.333

125

0

1

0

ON

33.333

66.666

125

0

1

1

ON

66.666

66.666

125

1

0

0

ON

33.333

50

125

1

0

1

ON

33.333

50

100

1

1

0

ON

33.333

66.666

100

1

1

1

ON

33.30

50

125

Pin

Number

Pin

Name

Pin

Type

Pin Description

1

X2

Output

Crystal connection. Connect to 25 MHz crystal input or float for

clock.

2

X1

Input

Crystal connection. Connect to 25 MHz crystal or clock input.

3

GND

Power

Connect to ground.

4

CLK3

Output

Selectable clock output. See table above for frequency. Weak

internal pull-down when tri-state.

5

PDTS

Input

Powers down entire chip and tri-states outputs when low. Internal

pull-up resistor.

6

S2

Input

Select pin. Selects clock output frequency from table above.

Internal pull-up resistor.

7

CLK2

Output

Selectable clock output. See table above for frequency. Weak

internal pull-down when tri-state.

8

VDD

Power

Connect to +3.3 V.

9

S1

Input

Select pin. Selects clock output frequency from table above.

Internal pull-up resistor.

10

GND

Power

Connect to ground.

11

CLK1

Output

Selectable clock output. See table above for frequency. Weak

internal pull-down when tri-state.

12

VDD

Power

Connect to +3.3 V.

13

S0

Input

Select pin. Selects clock output frequency from table above.

Internal pull-up resistor.