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ICS664-01 Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS664-01 Datasheet(HTML) 1 Page - Integrated Circuit Systems |
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1 / 6 page ![]() ICS664-01 MDS 664-01 A 1 Revision 050704 Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com Digital Video Clock Source Description The ICS664-01 provides clock generation and conversion for clock rates commonly needed in HDTV digital video equipment. The ICS664-01 uses the latest PLL technology to provide excellent phase noise and long term jitter performance for superior synchronization and S/N ratio. For audio sampling clocks generated from 27 MHz, use the ICS661. Please contact ICS if you have a requirement for an input and output frequency not included in this document. ICS can rapidly modify this product to meet special requirements. Features • Packaged in 16-pin TSSOP • Clock or crystal input provides flexibility • Low phase noise supports enhanced SNR • Lowest jitter in class at 100 ps • Exact (0 ppm) multiplication ratios • Power-down mode lowers power consumption • Improved phase noise over ICS660 Block Diagram PLL Clock Synthesis SELIN Crystal Oscillator X2 X1/REFIN VDD (P2) VDD (P14) CLK GND (P13) GND (P6) GND (P5) S3:0 4 VDD (P3) VDDO |
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