MDS 670-04 B

2

Revision 011905

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ICS670-04

Pin Assignment

Multiplier Select Table

Pin Descriptions

12

1

11

2

10

3

9

VDD

4

VDD

5

VDD

6

GND

7

CLK2

8

OE2

GND

S0

S1

FBCLK

S3

OE1

ICLK

16

15

14

13

FBIN

GND

S2

S3

S2

S1

S0

CLK2 (and FBCLK)

Input Range (MHz)

0

0

0

0

Low (Power down

entire chip)

—

0

0

0

1

Input x1.333

18 - 157.5

0

0

1

0

Input x6

5 - 35

0

0

1

1

Input x1.5

16.67 - 140

0

1

0

0

Input x3.333

7.5 - 63

0

1

0

1

Input x2.50

10 - 84

0

1

1

0

Input x4

6 - 52.5

0

1

1

1

Input x1

25 - 210

1

0

0

0

Input x2.333

11 - 90

1

0

0

1

Input x2.666

10 - 78.75

1

0

1

0

Input x12

5 - 17.5

1

0

1

1

Input x3

8 - 70

1

1

0

0

Input x10

5 - 21

1

1

0

1

Input x5

6 - 42

1

1

1

0

Input x8

5 - 26.25

1

1

1

1

Input x2

12 - 105

Pin

Number

Pin

Name

Pin

Type

Pin Description

1 - 3

VDD

Input

Power supply. Connect both pins to the same voltage (either 3.3 V or 5 V).

4

CLK2

Output Clock output from VCO. Output frequency equals the input frequency times

multiplier.

5

OE2

Input

Output clock enable 2. Tri-states the clock 2 output when low.

6

FBCLK

Output Clock output from VCO. Output frequency equals the input frequency times

multiplier.

7

OE1

Input

Output clock enable 1. Tri-states the feedback clock output when low.

8

FBIN

Input

Feedback clock input.

9

ICLK

Input

Clock input. Connect to a 5 - 210 MHz clock.

10

S3

Input

Multiplier select pin 3. Determines outputs per table above. Internal pull-up.

11

S2

Input

Multiplier select pin 2. Determines outputs per table above. Internal pull-up.

12

S1

Input

Multiplier select pin 1. Determines outputs per table above. Internal pull-up.

13

S0

Input

Multiplier select pin 0. Determines outputs per table above. Internal pull-up.

14 - 16

GND

Power Connect to ground.