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5000 Datasheet(PDF) 3 Page - ON Semiconductor

Part # 5000
Description  Evaluation Board Manual for NCN8025A QFN-24
PDF  7 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

5000 Datasheet(HTML) 3 Page - ON Semiconductor

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NCN8025AEVB
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2
TEST PROCEDURE
See Figure 2.
Initial Setups
The initial setups given here are recommended before
starting measurements on the board.
• Set the CMDVCC/ in the OFF position (High).
• Set CLKDIV1 and CLKDIV2 into low position (lowest
frequency Fclkin)
• 2 pins are used to change the Card VCC power supply
or the smart card interface mode which can be 1.8 V,
3.0 V or 5.0 V. These 2 pins are VSL0 and VSEL1 and
on the board, changing VSEL0 and VSEL1 is done
using 2 corresponding switches (see Figure 2)
according to the below Table 1. When VSEL0 = 0 then
VSEL1 is in the mode 5 V/3 Vbar, when VSEL0=1
then VSEL1 is in the mode 1.8 V / 3 Vbar. The initial
setup can be VSEL0 = 0 and VSEL1 = 1 for selecting
the 5 V mode. The card VCC (CVCC) output voltage
cannot be changed on the fly when the smart card
interface is active (/CMDVCC = Low). For changing
card VCC it is necessary to deactivate the device then to
reconfigure the card VCC by setting the appropriate
VSEL0 and VSEL1 finally the smart can be activated
again with this new smart card power supply voltage.
Table 1. CVCC Programming
VSEL0
VSEL1
CVCC
0
0
3.0 V
0
1
5.0 V
1
0
3.0 V
1
1
1.8 V
• As a precaution, turn the 1 kW potentiometer to obtain a
resistor output value of 1 k
W, and then connect the
jumper.
DC Power Supplies
Two power supplies are used to bias the demo board.
VDDP is the input voltage of LDO Regulator. VDD is the
“digital” power supply which biases the input stages of the
NCN8025A device (control and signal inputs).
VDD and VDDP must be connected to the board to ensure
correct operation. Connect the VDD and VDDP power
supplies using the 2 pin male connectors J2 and J1
respectively.
Clock Frequency
CLKDIV1 and CLKDIV2 select the frequency divider
according to the table given below.
Table 2. Clock Division Ratio Programming
CLKDIV1
CLKDIV2
Divider
1
0
DIV 1/1
1
1
DIV 1/2
0
1
DIV 1/4
0
0
DIV 1/8
Card Presence
The socket we use is a normally open, so PRES/ has been
chosen; nevertheless the PRES and PRES/ test points can
also be used for signaling the presence of a card and starting
up the circuit.
The Clock
The clock is applied externally (SMB connector).
Start the Measurement
To start the measurments, set the board as it follows:
• Set CLKDIV1 and CLKDIV2 to select the correct
frequency.
• Set 5 V / 3 Vbar to select the correct output voltage.
• Jumpers:
− 1 k
W potentiometer jumper: not connected to start
the measure.
• Finally, toggle /CMDVCC from High to Low to start
the device (activation sequence run).



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