ICS843404 datasheet(11/19 Pages) ICST

11 / 19 page

843404AG

www.icst.com/products/hiperclocks.html

REV. A OCTOBER 17, 2005

Integrated

Circuit

Systems, Inc.

ICS843404

LVCMOS/CRYSTAL-TO-3.3V LVPECL AND

LVDS CLOCK GENERATOR

INPUTS:

CRYSTAL INPUT:

For applications not requiring the use of the crystal oscillator

input, both XTAL_IN and XTAL_OUT can be left floating.

Though not required, but for additional protection, a 1k

resistor can be tied from XTAL_IN to ground.

TEST_CLK INPUT:

For applications not requiring the use of the clock, it can be

left floating. Though not required, but for additional protection,

a 1k

Ω resistor can be tied from the TEST_CLK to ground.

LVCMOS CONTROL PINS:

All control pins have internal pull-ups or pull-downs; additional

resistance is not required but can be added for additional

protection. A 1k

Ω resistor can be used.

RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS

OUTPUTS:

LVPECL OUTPUT

All unused LVPECL outputs can be left floating. We

recommend that there is no trace attached. Both sides of the

differential output pair should either be left floating or

terminated.

LVDS OUTPUT

All unused LVDS output pairs can be either left floating or

terminated with 100

Ω across. If they are left floating, we

recommend that there is no trace attached.

LVDS DRIVER TERMINATION

A general LVDS interface is shown in Figure 3. In a 100

differential transmission line environment, LVDS drivers

require a matched load termination of 100

Ω across near

100 Ohm Differiential Transmission Line

100

3.3V

LVDS_Driv er

3.3V

FIGURE 3. TYPICAL LVDS DRIVER TERMINATION

the receiver input. For a multiple LVDS outputs buffer, if only

partial outputs are used, it is recommended to terminate the

un-used outputs.

100

Ω Differential Transmission Line

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