MAX5969D datasheet(4/16 Pages) MAXIM

4 / 16 page

IEEE 802.3af/at-Compliant, Powered Device Interface

Controller with Integrated Power MOSFET

4 ______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VIN = (VDD - VSS) = 48V, RDET = 24.9kω, RCLS = 615ω, and RSL = 60.4kω. RTN, WAD, PG, and 2EC unconnected, all voltages are

referenced to VSS, unless otherwise noted. TA = TJ = -40NC to +85NC, unless otherwise noted. Typical values are at TA = +25NC.)

(Note 3)

Note 3: This device is 100% production tested at TA = +25NC. Limits over temperature are guaranteed by design.

Note 4: The input offset current is illustrated in Figure 1.

Note 5: Effective differential input resistance is defined as the differential resistance between VDD and VSS. See Figure 1.

Note 6: Classification current is turned off whenever the device is in power mode.

Note 7: UVLO hysteresis is guaranteed by design, not production tested.

Note 8: A 20V glitch on input voltage, which takes VDD below VON shorter than or equal to tOFF_DLY does not cause the

MAX5969D to exit power-on mode.

Note 9: In power mode, current-limit foldback is used to reduce the power dissipation in the isolation MOSFET during an overload

condition across VDD and RTN.

Figure 1. Effective Differential Input Resistance/Offset Current

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

PG Sink Current

VRTN = 1.5V, VPG = 0.8V, during inrush

period

125

230

375

PG Off-Leakage Current

VPG = 60V

THERMAL SHUTDOWN

Thermal-Shutdown Threshold

TSD

TJ rising

+140

Thermal-Shutdown Hysteresis

TJ falling

IIN

IINi + 1

IINi

IOFFSET

dRi

VINi

VINi + 1

IOFFSET = IINi -

VINi

dRi

dRi =

(VINi + 1 - VINi)

(IINi + 1 - IINi) (IINi + 1 - IINi)

VIN

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