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UG5613 Datasheet(PDF) 3 Page - Maxim Integrated Products |
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UG5613 Datasheet(HTML) 3 Page - Maxim Integrated Products |
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3 / 19 page ![]() Corona (MAXREFDES12#) Nexys 3 Quick Start Guide 3 1. Required Equipment • PC with Windows® OS with Xilinx® ISE®/SDK version 13.4 or later and one USB port • License for Xilinx EDK/SDK version 13.4 or later • Corona (MAXREFDES12#) board • Nexys™3 development kit • One 24V 1A DC power supply 2. Overview Below is a high-level overview of the steps required to quickly get the Corona design running by downloading and running the FPGA project. Detailed instructions for each step are provided in the following pages. The Corona (MAXREFDES12#) subsystem reference design will be referred to as Corona throughout this document. 1) Connect the Corona board to the JA1 port of a Nexys 3 development kit as shown in Figure 1. Ensure the connector is aligned as shown in Figure 2. 2) Download the latest RD12V01_00.ZIP file located at the Corona page. 3) Extract the RD12V01_00.ZIP file to a directory on your PC. 4) Open the Xilinx SDK. 5) Download the bitstream (.BIT) file to the board. This bitstream contains the FPGA hardware design and software bootloader. 6) Use Xilinx SDK to download and run the executable file (.ELF) on the MicroBlaze™. |
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