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MAX3522B Datasheet(PDF) 4 Page - Maxim Integrated Products |
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MAX3522B Datasheet(HTML) 4 Page - Maxim Integrated Products |
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4 / 15 page ![]() (VDD = 4.75V to 5.25V, VGND = 0V, ZOUT = 75Ω, TXEN = high, Power code = 3, TA = 0°C to 70°C, Typical values are at VDD = 5V, TA = +25°C, unless otherwise noted. Typical Application Circuit as shown. Note 1. ) Note 1: Limits are tested at TA = +70°C. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. Note 2: Guaranteed by design and characterization. Note 3: For operation from a 100Ω source impedance, a 200Ω external shunt resistance must be added. See Typical Application Circuit. Note 4: Output return loss is measured with the LC matching network, as shown in the Typical Application Circuit. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 2nd Harmonic HD2 fIN = 100MHz, VOUT = +68dBmV (Note 2) -55 dBc Two-Tone 2nd-Order Distortion (f1 + f2) IM2 f1 = 75MHz, f2 = 80MHz, VOUT = +65dBmV/ tone (Note 2) -55 dBc 3rd Harmonic Distortion HD3 fIN = 65MHz, VOUT = +68dBmV (Note 2) -60 -55 dBc Two-Tone 3rd-Order Distortion IM3 f1 = 75MHz, f2 = 80MHz, VOUT = +65dBmV/tone -63 -57 dBc Output Compression at Peak Output Gain = 25dB, output power = +79dBmV 0.3 dBmV MER 4k FFT, 1024-QAM, VOUT = +66dBmV fIN = 150MHz, BW = 96MHz 48.5 dB fIN = 192MHz, BW = 24MHz 47 4k FFT, 1024-QAM, VOUT = +67dBmV, L1 = L2 = 68nH, C14 = C15 = 10pF fIN = 150MHz, BW = 96MHz 46.4 fIN = 192MHz, BW = 24MHz 47.3 SERIAL PROGRAMMABLE INTERFACE CSB to SCLK Rise Setup Time tSENS 20 ns CSB to SCLK Rise Hold Time tSENH 10 ns SDA to SCLK Setup Time tSDAS 20 ns SDA to SCLK Hold Time tSDAH 10 ns SCLK Pulse-Width High tSCLKH 50 ns SCLK Pulse-Width Low tSCLKL 50 ns Maximum SCLK Frequency fSCLK 10 MHz Electrical Characteristics (continued) www.maximintegrated.com Maxim Integrated │ 4 MAX3522B DOCSIS 3.1 Programmable-Gain Amplifier |
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