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AT90USB646 Datasheet(PDF) 111 Page - ATMEL Corporation |
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AT90USB646 Datasheet(HTML) 111 Page - ATMEL Corporation |
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111 / 434 page  111 7593A–AVR–02/06 AT90USB64/128 Figure 13-9. Timer/Counter Timing Diagram, with Prescaler (f clk_I/O/8) Figure 13-10 shows the setting of OCF0B in all modes and OCF0A in all modes except CTC mode and PWM mode, where OCR0A is TOP. Figure 13-10. Timer/Counter Timing Diagram, Setting of OCF0x, with Prescaler (f clk_I/O/8) Figure 13-11 shows the setting of OCF0A and the clearing of TCNT0 in CTC mode and fast PWM mode where OCR0A is TOP. Figure 13-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Pres- caler (f clk_I/O/8) 13.8 8-bit Timer/Counter Register Description 13.8.1 Timer/Counter Control Register A – TCCR0A TOVn TCNTn MAX - 1 MAX BOTTOM BOTTOM + 1 clk I/O clk Tn (clk I/O/8) OCFnx OCRnx TCNTn OCRnx Value OCRnx - 1 OCRnx OCRnx + 1 OCRnx + 2 clk I/O clk Tn (clk I/O/8) OCFnx OCRnx TCNTn (CTC) TOP TOP - 1 TOP BOTTOM BOTTOM + 1 clk I/O clk Tn (clk I/O/8) Bit 7 6 543 2 1 0 COM0A 1 COM0A 0 COM0B 1 COM0B 0 –– WGM0 1 WGM0 0 TCCR0A Read/Write R/W R/W R/W R/W R R R/W R/W |
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