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AT90USB646 Datasheet(PDF) 290 Page - ATMEL Corporation |
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AT90USB646 Datasheet(HTML) 290 Page - ATMEL Corporation |
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290 / 434 page ![]() 290 7593A–AVR–02/06 AT90USB64/128 • 1 - STALLEDI - STALLEDI Interrupt Flag Set by hardware to signal that a STALL handshake has been sent, or that a CRC error has been detected in a OUT isochronous endpoint. Shall be cleared by software. Setting by software has no effect. • 0 - TXINI - Transmitter Ready Interrupt Flag Set by hardware to signal that the current bank is free and can be filled. An interrupt (EPINTx) is triggered (if enabled). Shall be cleared by software to handshake the interrupt. Setting by software has no effect. This bit is inactive (cleared) if the endpoint is an OUT endpoint. • 7 - FLERRE - Flow Error Interrupt Enable Flag Set to enable an endpoint interrupt (EPINTx) when OVERFI or UNDERFI are sent. Clear to disable an endpoint interrupt (EPINTx) when OVERFI or UNDERFI are sent. • 6 - NAKINE - NAK IN Interrupt Enable Bit Set to enable an endpoint interrupt (EPINTx) when NAKINI is set. Clear to disable an endpoint interrupt (EPINTx) when NAKINI is set. •5 - Reserved The value read from these bits is always 0. Do not set these bits. • 4 - NAKOUTE - NAK OUT Interrupt Enable Bit Set to enable an endpoint interrupt (EPINTx) when NAKOUTI is set. Clear to disable an endpoint interrupt (EPINTx) when NAKOUTI is set. • 3 - RXSTPE - Received SETUP Interrupt Enable Flag Set to enable an endpoint interrupt (EPINTx) when RXSTPI is sent. Clear to disable an endpoint interrupt (EPINTx) when RXSTPI is sent. • 2 - RXOUTE - Received OUT Data Interrupt Enable Flag Set to enable an endpoint interrupt (EPINTx) when RXOUTI is sent. Clear to disable an endpoint interrupt (EPINTx) when RXOUTI is sent. • 1 - STALLEDE - Stalled Interrupt Enable Flag Set to enable an endpoint interrupt (EPINTx) when STALLEDI is sent. Clear to disable an endpoint interrupt (EPINTx) when STALLEDI is sent. • 0 - TXINE - Transmitter Ready Interrupt Enable Flag Set to enable an endpoint interrupt (EPINTx) when TXINI is sent. Bit 7 6 5 4 3 210 FLERRE NAKINE - NAKOUTE RXSTPE RXOUTE STALLEDE TXINE UEIENX Read/Write R/W R/W R R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 |
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