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AT90USB646 Datasheet(PDF) 325 Page - ATMEL Corporation |
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AT90USB646 Datasheet(HTML) 325 Page - ATMEL Corporation |
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325 / 434 page ![]() 325 7593A–AVR–02/06 AT90USB64/128 25.6.2 Analog Noise Canceling Techniques Digital circuitry inside and outside the device generates EMI which might affect the accuracy of analog measurements. If conversion accuracy is critical, the noise level can be reduced by applying the following techniques: a. Keep analog signal paths as short as possible. Make sure analog tracks run over the analog ground plane, and keep them well away from high-speed switching digi- tal tracks. b. The AV CC pin on the device should be connected to the digital VCC supply voltage via an LC network as shown in Figure 25-9. c. Use the ADC noise canceler function to reduce induced noise from the CPU. d. If any ADC port pins are used as digital outputs, it is essential that these do not switch while a conversion is in progress. Figure 25-9. ADC Power Connections 25.6.3 Offset Compensation Schemes The gain stage has a built-in offset cancellation circuitry that nulls the offset of differential mea- surements as much as possible. The remaining offset in the analog path can be measured directly by selecting the same channel for both differential inputs. This offset residue can be then subtracted in software from the measurement results. Using this kind of software based offset correction, offset on any channel can be reduced below one LSB. 25.6.4 ADC Accuracy Definitions An n-bit single-ended ADC converts a voltage linearly between GND and V REF in 2 n steps (LSBs). The lowest code is read as 0, and the highest code is read as 2 n-1. Several parameters describe the deviation from the ideal behavior: VCC GND 100nF Analog Ground Plane (ADC0) PF0 (ADC7) PF7 (ADC1) PF1 (ADC2) PF2 (ADC3) PF3 (ADC4) PF4 (ADC5) PF5 (ADC6) PF6 AREF GND AVCC 52 53 54 55 56 57 58 59 60 61 61 62 62 63 63 64 64 1 51 (AD0) PA0 10 μH |
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