Z85233 datasheet(19/19 Pages) ZILOG

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SCC™/ESCC™ User’s Manual

General Description

1-9

A//B. Channel A/Channel B (input). This signal selects the

channel in which the read or write operation occurs. High

selects channel A and Low selects channel B.

D//C. Data/Control Select (input). This signal defines the

type of information transferred to or from the Z85X30.

High means data is being transferred and Low indicates

a command.

1.4.3 Pin Descriptions, (Z80X30 Only)

AD7-AD0. Address/Data Bus (bidirectional, active High,

tri-state). These multiplexed lines carry register addresses

to the Z80X30 as well as data or control information to and

from the Z80X30.

R//W. Read//Write (input, read active High). This signal

specifies whether the operation to be performed is a read

or a write.

/CS0. Chip Select 0 (input, active Low). This signal is

latched concurrently with the addresses on AD7-AD0 and

must be active for the intended bus transaction to occur.

CS1. Chip Select 1 (input, active High). This second select

signal must also be active before the intended bus trans-

action can occur. CS1 must remain active throughout the

transaction.

/DS. Data Strobe (input, active Low). This signal provides

timing for the transfer of data into and out of the Z80X30.

If /AS and /DS are both Low, this is interpreted as a reset.

/AS. Address Strobe (input, active Low). Address on AD7-

AD0 are latched by the rising edge of this signal.

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UM010901-0601

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