FEDL9227-01

OKI Semiconductor

ML9227

13/26

FUNCTIONAL DESCRIPTION

Power-on Reset

When power is turned on, ML9227 is initialized by the internal power-on reset circuit.

The status of the internal circuit after initialization is as follows:

• The contents of the shift registers and latches are set to “0”.

• The digital dimming duty cycle is set to “0”.

• All segment outputs are set to Low level.

• GRID1 outputs are set to Low level.

• GRID2 to 3 outputs are set to High level.

• All the ROW outputs are set to Low level.

• INT output is set to Low level.

Mode Data

ML9227 has the seven function modes. The function mode is selected by the mode data (M0 to M2). The relation

between function mode and mode data (M0 to M2) is as follows:

FUNCTION DATA

FUNCTION MODE

OPERATING MODE

M0

M1

M2

0

Segment Data for

GRID1-3 Input

0

0

0

1

Segment Data for

GRID1 Input

1

0

0

2

Segment Data for

GRID2 Input

0

1

0

3

Segment Data for

GRID3 Input

1

1

0

4

Digital Dimming Data Input

0

0

1

5

Key scan Stop

1

0

1

6

Switch Data Output

0

1

1

7

A/D Data Output

1

1

1

Data Input and Output

Data input and output through the DATA-I/O pin is valid only when the CS pin is set at a High level.

The input data to DATA I/O pin is shifted into the shift register at the rising edge of the serial clock. The data is

automatically loaded to the latches when the CS pin is set at a Low level.

10-bit dimming data (D1 to D10) and 27-bit segment data (S1 to S27) are used for inputting of dimming data and

display data. To transfer these two data, the mode data (M0 to M2) must be sent after each of these data

succeddingly.

The output data from the DATA I/O pin is output from the shift register at the rising edge of the serial clock.

ML9227 outputs 48-bit (6ch

× 8bits) A/D data (A11 to A68) and 29-bit key data (S11 to S55, R1 and Q1 to Q3). To

receive these data, the mode data (M0 to M2) must be sent first and then CS must be set once to Low level and set

again to High level.

Then inputting serial clocks, these data are output from the DATA I/O pin.

When the CS pin is set at a Low level, the DATA I/O pin returns to an input pin.

To stop the keyscan, the only mode data (M0 to M2) must be sent. After the mode data transfer, the key scanning is

stopped immediately.