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54AC273 Datasheet(PDF) 1 Page - Silicon Supplies |
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54AC273 Datasheet(HTML) 1 Page - Silicon Supplies |
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1 / 7 page ![]() Die Size (Unsawn) 1650 x 1500 65 x 59 µm mils Advanced CMOS Logic – 54AC273 8-bit D-Type Flip-Flop with common reset and clock inputs in bare die form Rev 1.0 07/12/2021 Buffered common clock Buffered asynchronous master reset Outputs Source/Sink 24mA Low input current: 1µA Outputs directly interface CMOS, NMOS and TTL Operating voltage range: 2.0V to 6.0V Function compatible with 54HC273 Full military temperature range. Features: Ordering Information The following part suffixes apply: No suffix - MIL-STD-883 /2010B Visual Inspection “H” - MIL-STD-883 /2010B Visual Inspection + MIL-PRF-38534 Class H LAT “K” - MIL-STD-883 /2010A Visual Inspection (Space) + MIL-PRF-38534 Class K LAT LAT = Lot Acceptance Test. For further information on LAT process flows see below. www.siliconsupplies.com\quality\bare-die-lot-qualification Supply Formats: Mechanical Specification Default – Die in Waffle Pack (100 per tray capacity) The 54AC273 consists of eight D-type flip-flops fabricated using a 1.5µm 5V CMOS process combining high speed performance LSTTL performance with CMOS low power consumption. Each flip-flop is equipped with buffered common Clock (CP) and common Reset (MR) inputs. A low-to-high clock transition loads each flip-flop. Reset is asynchronous and enabled with active low. Inputs accept standard CMOS outputs or LSTTL outputs using pull-up resistors. Inputs are also equipped with protection circuits against static discharge and transient excess voltage. Description Die Dimensions in µm (mils) 1650 (65) Sawn Wafer on Tape – On request 108 x 108 µm Minimum Bond Pad Size 4.25 x 4.25 mils Unsawn Wafer – On request 460 (±20) µm Die Thickness 18.11 (±0.79) mils Die Thickness <> 460µm(18 Mils) – On request Top Metal Composition Al 1%Si 1.1µm Assembled into Ceramic Package – On request Back Metal Composition N/A – Bare Si Page 1 of 7 www.siliconsupplies.com |
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