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CGS700V Datasheet(PDF) 1 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # CGS700V
Description  Commercial Low Skew PLL 1 to 9 CMOS Clock Driver
PDF  6 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

CGS700V Datasheet(HTML) 1 Page - National Semiconductor (TI)

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TLF11955
September 1995
CGS700V
Commercial Low Skew PLL 1 to 9 CMOS Clock Driver
General Description
CGS700 is an off the shelf clock driver specifically designed
for today’s high speed processors It provides low skew out-
puts which are produced at different frequencies from three
fixed input references The XTALIN input pin is designed to
be driven from three distinct crystal oscillators running at
25 MHz 33 MHz or 40 MHz
The PLL using a charge pump and an internal loop filter
multiplies this input frequency to create a maximum output
frequency of four times the input
The device includes a TRI-STATE
control pin to disable
the outputs while the PLL is still in lock This function allows
for testing the board without having to wait to acquire the
lock once the testing is complete
(continued)
Features
Y
Guaranteed and tested
500 ps pin-to-pin skew (tOSHL and tOSLH)on1X
outputs
Y
Guaranteed
400 ps pin-to-pin skew (tOSHL and tOSLH)on
1Xoutputs
Y
PentiumTM and PowerPCTM compatible
Y
Output buffer of nine drivers for large fanout
Y
25 MHz – 160 MHz output frequency range
Y
Outputs operating at 4X 2X 1X of the reference
frequency for multi-frequency bus applications
Y
Selectable output frequency
Y
TRI-STATE output control with the PLL is in the lock
state
Y
Internal loop filter to reduce noise and jitter
Y
Separate analog and digital VCC and Ground pins
Y
Low frequency test mode by disabling the PLL
Y
Implemented on National’s Core CMOS process
Y
Symmetric output current drive
a
30 mA b30 mA IOL IOH
Y
28-pin PCC for optimum skew performance
Y
Guaranteed 2k ESD protection
Connection Diagram
Pin Assignment for PLCC
TLF11955 – 1
See NS Package Number V28A
TRI-STATE
is a registered trademark of National Semiconductor Corporation
PowerPCTM is a trademark of IBM
PentiumTM is a trademark of Intel Corporation
Pin Description
PLCC Package
Pin
Name
Description
1VCC
Digital VCC
2
SKWSEL
Skew Test Selector Pin
3
CLK4
4X Clock Output
4VCC
Digital VCC
5
XTALIN
Crystal Oscillator Input
6
GND
Digital Ground
7
CLK1
0
1X Clock Output
8VCC
Digital VCC
9
CLK1
1
1X Clock Output
10
GND
Digital Ground
11
CLK1
2
1X Clock Output
12
TRI-STATE
Output TRI-STATE Control
13
SKWTST
Skew Testing Pin
14
CLK1
3
1X Clock Output
15
GND
Digital Ground
16
CLK1
4
1X Clock Output
17
VCC
Digital VCC
18
EXTCLK
External Test Clock
19
GNDA
Analog Ground
20
VCCA
Analog VCC
21
EXTSEL
External Clock Mux Selector
22
GND
Digital Ground
23
CLK1
5
1X Clock Output
24
VCC
Digital VCC
25
CLK1
6
1X Clock Output
26
CLK1SEL
CLK1 Multiplier Selector
27
GND
Digital Ground
28
CLK2
2X Clock Output
C1996 National Semiconductor Corporation
RRD-B30M66Printed in U S A


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