Electronic Components Datasheet Search
  English  ▼

X  

NJU6820 Datasheet(PDF) 21 Page - New Japan Radio

Part # NJU6820
Description  40-common x 128RGB-Segment, in 4096-Color 4096-Color STN LCD DRIVER
PDF  101 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NJRC [New Japan Radio]
Direct Link  http://www.jrc.co.jp/eng/index.html
Logo NJRC - New Japan Radio

NJU6820 Datasheet(HTML) 21 Page - New Japan Radio

Back Button NJU6820 Datasheet HTML 17Page - New Japan Radio NJU6820 Datasheet HTML 18Page - New Japan Radio NJU6820 Datasheet HTML 19Page - New Japan Radio NJU6820 Datasheet HTML 20Page - New Japan Radio NJU6820 Datasheet HTML 21Page - New Japan Radio NJU6820 Datasheet HTML 22Page - New Japan Radio NJU6820 Datasheet HTML 23Page - New Japan Radio NJU6820 Datasheet HTML 24Page - New Japan Radio NJU6820 Datasheet HTML 25Page - New Japan Radio Next Button
Zoom Inzoom in Zoom Outzoom out
 21 / 101 page
background image
NJU6820
- 21 -
In the 16-bit data bus length mode
column-address
0H
7FH
0 H
12bit
12bit
row-address
27H
12bit
12bit
Fig6
In the B&W mode, only MSB data from each 4-bit display data group in the DDRAM is used. Therefore,
384 x 40 pixels in the B&W and 128 x 40 pixels in the 8-gradation are available.
The range of the column address varies depending on data bus length. The range between 00H and
FFH is used in the 8-bit data bus length and the range between 00H and 7FH is in the 16-bit data bus
length.
The increments for the column address and row address are set to the auto-increment mode by
programming the “AXI” and “AYI” registers of the “Increment control” instruction. In this mode, the
contents of the column address and row address counters automatically increment whenever the
DDRAM is accessed.
The column address and row address counters, independent of the line counter. They are used to
designate the column and row addresses for the display data transferred from MPU. On the other hand,
the line counter is used to generate the line address, and output display data to the segment drivers,
being synchronized with the display control timing of the FLM and CL signals.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com