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LTM4650A Datasheet(PDF) 10 Page - Analog Devices

Part # LTM4650A
Description  Quad DC/DC 關Module Regulator with Configurable Dual 12A, Dual 5A Output Array
PDF  36 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM4650A Datasheet(HTML) 10 Page - Analog Devices

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LTM4671
10
Rev. B
For more information www.analog.com
PIN FUNCTIONS
VIN (D7-D11, E8, H6, J5-J6, L5-L6, M6, R10, T7-T11):
Power Input. Pins connect to the drain of the internal top
MOSFET and Signal VIN to the internal 3.3V regulator for
the control circuitry for each switching mode regulator
channel.ApplyinputvoltagesbetweenthesepinsandGND
pins. Recommend placing input decoupling capacitance
directly between each of VIN pins and GND pins.
GND (A4-A5, A8-A11, B4-B11, C4-C11, D4-D6, E3-E5,
F1-F7, G1-G6, G10, H5, H7, J7, J9, K1-K7, K11, L7,
L11, M5, M7, M10, N1-N6, P1-P5, P11, R3-R5, T4-T6,
U4-U11, V4-V11, W4-W5, W8-W11): Power Ground Pins
for Both Input and Output Returns. Use large PCB copper
areas to connect all GND together.
PINS FOR DUAL 12A CHANNELS:
VOUT0 (A1-A3, B1-B3, C1-C3, D1-D3, E1-E2), VOUT3
(R1-R2, T1-T3, U1-U3, V1-V3, W1-W3): Power Output
Pins of Each 12A Switching Mode Regulator Channel.
Apply output load between these pins and GND pins. Rec-
ommend placing output decoupling capacitance directly
between these pins and GND pins. See the Applications
Information section for paralleling outputs.
PGOOD0 (E11), PGOOD3 (R7): Output Power Good with
Open-Drain Logic of Each 12A Switching Mode Regulator
Channel. PGOOD is pulled to ground when the voltage on
theFBpinisnotwithin±10%oftheinternal0.6Vreference.
INTVCC0 (E7), INTVCC3 (R11): Internal 3.3V Regulator
Output of Each 12A Switching Mode Regulator Channel.
The internal power drivers and control circuits are pow-
ered from this voltage. Decouple each pin to GND with a
minimum of 2.2µF local low ESR ceramic capacitor.
RUN0 (F11), RUN3 (P7): Run Control Input of Each 12A
Switching Mode Regulator Channel. Enable regulator
operation by tying the specific RUN pin above 1.2V. Tying
it below 1.1V shuts down the specific regulator channel.
COMP0a (H10), COMP3a (N9): Current Control Thresh-
old and Error Amplifier Compensation Point of Each 12A
Switching Mode Regulator Channel. The internal current
comparatorthresholdislinearlyproportionaltothisvoltage.
Tie the COMPa pins from different channels together for
parallel operation. The device is internally compensated.
Connect to COMP0b or COMP3b, respectively, to use the
internal compensation. Or connect to a Type-II C-R-C
network to use customized compensation.
COMP0b (H11), COMP3b (N8): Internal Loop Compen-
sation Network for Each 12A Switching Mode Regulator
Channel. Connect to COMP0a or COMP3a, respectively, to
use the internal compensation in majority of applications.
FB0 (G9), FB3 (N10): The Negative Input of the Error
AmplifierforEach12ASwitchingModeRegulatorChannel.
This pin is internally connected to VOSNS0+ or VOSNS3+,
respectively, with a 60.4kΩ precision resistor. Output
voltages can be programmed with an additional resistor
between FB and VOSNS– pins. In PolyPhase® operation,
tying the FB pins together allows for parallel operation.
See the Applications Information section for details.
TRACK/SS0 (F9), TRACK/SS3 (P9): Output Tracking and
Soft-Start Pin of Each 12A Switching Mode Regulator
Channel. Allows the user to control the rise time of the
output voltage. Putting a voltage below 0.6V on this pin
bypasses the internal reference input to the error ampli-
fier, instead it servos the FB pin to the TRACK voltage.
Above 0.6V, the tracking function stops and the internal
reference resumes control of the error amplifier. There’s
an internal 6µA pull-up current from INTVCC on this pin,
so putting a capacitor here provides soft-start function.
See the Applications Information section for details.
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY.



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